677     reg_frm->common.enc_pic.cur_frm_ref = 1;  in vepu511_h265e_save_pass1_patch()
678     reg_frm->common.rfpw_h_addr = mpp_buffer_get_fd(ctx->buf_pass1);  in vepu511_h265e_save_pass1_patch()
679     reg_frm->common.rfpw_b_addr = reg_frm->common.rfpw_h_addr;  in vepu511_h265e_save_pass1_patch()
680     reg_frm->common.enc_pic.rec_fbc_dis = 1;  in vepu511_h265e_save_pass1_patch()
688     reg_frm->common.sli_splt.sli_splt = 0;  in vepu511_h265e_save_pass1_patch()
689     reg_frm->common.enc_pic.slen_fifo = 0;  in vepu511_h265e_save_pass1_patch()
706     reg_frm->common.enc_pic.rfpr_compress_mode = 1;  in vepu511_h265e_use_pass1_patch()
708     reg_frm->common.src_fmt.src_cfmt = VEPU5xx_FMT_YUV420SP;  in vepu511_h265e_use_pass1_patch()
709     reg_frm->common.src_fmt.alpha_swap = 0;  in vepu511_h265e_use_pass1_patch()
710     reg_frm->common.src_fmt.rbuv_swap = 0;  in vepu511_h265e_use_pass1_patch()
711     reg_frm->common.src_fmt.out_fmt = 1;  in vepu511_h265e_use_pass1_patch()
713     reg_frm->common.src_strd0.src_strd0 = y_stride;  in vepu511_h265e_use_pass1_patch()
714     reg_frm->common.src_strd1.src_strd1 = y_stride;  in vepu511_h265e_use_pass1_patch()
716     reg_frm->common.src_proc.src_mirr = 0;  in vepu511_h265e_use_pass1_patch()
717     reg_frm->common.src_proc.src_rot = 0;  in vepu511_h265e_use_pass1_patch()
719     reg_frm->common.adr_src0 = mpp_buffer_get_fd(ctx->buf_pass1);  in vepu511_h265e_use_pass1_patch()
720     reg_frm->common.adr_src1 = reg_frm->common.adr_src0;  in vepu511_h265e_use_pass1_patch()
738         reg_frm->common.ebufb_addr = fd;  in setup_vepu511_ext_line_buf()
739         reg_frm->common.ebuft_addr = fd;  in setup_vepu511_ext_line_buf()
742         reg_frm->common.ebufb_addr = 0;  in setup_vepu511_ext_line_buf()
743         reg_frm->common.ebuft_addr = 0;  in setup_vepu511_ext_line_buf()
874     reg_frm->common.enc_rsl.pic_wd8_m1 = pic_width_align8 / 8 - 1;  in vepu511_h265_set_prep()
875     reg_frm->common.enc_rsl.pic_hd8_m1 = pic_height_align8 / 8 - 1;  in vepu511_h265_set_prep()
876     reg_frm->common.src_fill.pic_wfill = (syn->pp.pic_width & 0x7)  in vepu511_h265_set_prep()
878     reg_frm->common.src_fill.pic_hfill = (syn->pp.pic_height & 0x7)  in vepu511_h265_set_prep()
882     reg_frm->common.enc_pic.enc_stnd      = 1;  in vepu511_h265_set_prep()
884     reg_frm->common.enc_pic.cur_frm_ref   = !syn->sp.non_reference_flag;  in vepu511_h265_set_prep()
886     reg_frm->common.enc_pic.bs_scp        = 1;  in vepu511_h265_set_prep()
887     reg_frm->common.enc_pic.log2_ctu_num_hevc  = mpp_ceil_log2(pic_wd32 * pic_h32);  in vepu511_h265_set_prep()
892     reg_frm->common.enc_pic.rfpr_compress_mode = 0;  in vepu511_h265_set_prep()
893     reg_frm->common.enc_pic.rec_fbc_dis = 0;  in vepu511_h265_set_prep()
951         regs->reg_frm.common.sli_splt.sli_splt = 0;  in vepu511_h265_set_split()
952         regs->reg_frm.common.sli_splt.sli_splt_mode = 0;  in vepu511_h265_set_split()
953         regs->reg_frm.common.sli_splt.sli_splt_cpst = 0;  in vepu511_h265_set_split()
954         regs->reg_frm.common.sli_splt.sli_max_num_m1 = 0;  in vepu511_h265_set_split()
955         regs->reg_frm.common.sli_splt.sli_flsh = 0;  in vepu511_h265_set_split()
956         regs->reg_frm.common.sli_cnum.sli_splt_cnum_m1 = 0;  in vepu511_h265_set_split()
958         regs->reg_frm.common.sli_byte.sli_splt_byte = 0;  in vepu511_h265_set_split()
959         regs->reg_frm.common.enc_pic.slen_fifo = 0;  in vepu511_h265_set_split()
962         regs->reg_frm.common.sli_splt.sli_splt = 1;  in vepu511_h265_set_split()
963         regs->reg_frm.common.sli_splt.sli_splt_mode = 0;  in vepu511_h265_set_split()
964         regs->reg_frm.common.sli_splt.sli_splt_cpst = 0;  in vepu511_h265_set_split()
965         regs->reg_frm.common.sli_splt.sli_max_num_m1 = 500;  in vepu511_h265_set_split()
966         regs->reg_frm.common.sli_splt.sli_flsh = 1;  in vepu511_h265_set_split()
967         regs->reg_frm.common.sli_cnum.sli_splt_cnum_m1 = 0;  in vepu511_h265_set_split()
969         regs->reg_frm.common.sli_byte.sli_splt_byte = cfg->split_arg;  in vepu511_h265_set_split()
970         regs->reg_frm.common.enc_pic.slen_fifo = cfg->split_out ? 1 : 0;  in vepu511_h265_set_split()
974         regs->reg_frm.common.sli_splt.sli_splt = 1;  in vepu511_h265_set_split()
975         regs->reg_frm.common.sli_splt.sli_splt_mode = 1;  in vepu511_h265_set_split()
976         regs->reg_frm.common.sli_splt.sli_splt_cpst = 0;  in vepu511_h265_set_split()
977         regs->reg_frm.common.sli_splt.sli_max_num_m1 = 500;  in vepu511_h265_set_split()
978         regs->reg_frm.common.sli_splt.sli_flsh = 1;  in vepu511_h265_set_split()
979         regs->reg_frm.common.sli_cnum.sli_splt_cnum_m1 = cfg->split_arg - 1;  in vepu511_h265_set_split()
981         regs->reg_frm.common.sli_byte.sli_splt_byte = 0;  in vepu511_h265_set_split()
982         regs->reg_frm.common.enc_pic.slen_fifo = cfg->split_out ? 1 : 0;  in vepu511_h265_set_split()
998     reg_frm->common.me_rnge.cime_srch_dwnh = 15;  in vepu511_h265_set_me_regs()
999     reg_frm->common.me_rnge.cime_srch_uph  = 15;  in vepu511_h265_set_me_regs()
1000     reg_frm->common.me_rnge.cime_srch_rgtw = 12;  in vepu511_h265_set_me_regs()
1001     reg_frm->common.me_rnge.cime_srch_lftw = 12;  in vepu511_h265_set_me_regs()
1002     reg_frm->common.me_cfg.rme_srch_h      = 3;  in vepu511_h265_set_me_regs()
1003     reg_frm->common.me_cfg.rme_srch_v      = 3;  in vepu511_h265_set_me_regs()
1005     reg_frm->common.me_cfg.srgn_max_num      = 72;  in vepu511_h265_set_me_regs()
1006     reg_frm->common.me_cfg.cime_dist_thre    = 1024;  in vepu511_h265_set_me_regs()
1007     reg_frm->common.me_cfg.rme_dis           = 0;  in vepu511_h265_set_me_regs()
1008     reg_frm->common.me_cfg.fme_dis           = 0;  in vepu511_h265_set_me_regs()
1009     reg_frm->common.me_rnge.dlt_frm_num      = 0x1;  in vepu511_h265_set_me_regs()
1013             reg_frm->common.me_cach.colmv_load_hevc = 0;  in vepu511_h265_set_me_regs()
1015             reg_frm->common.me_cach.colmv_load_hevc = 1;  in vepu511_h265_set_me_regs()
1017         reg_frm->common.me_cach.colmv_stor_hevc = 1;  in vepu511_h265_set_me_regs()
1020     reg_frm->common.me_cach.cime_zero_thre = 64;  in vepu511_h265_set_me_regs()
1021     reg_frm->common.me_cach.fme_prefsu_en = 0;  in vepu511_h265_set_me_regs()
1094     regs->common.adr_src0  = mpp_buffer_get_fd(enc_task->input);  in vepu511_h265_set_hw_address()
1095     regs->common.adr_src1  = regs->common.adr_src0;  in vepu511_h265_set_hw_address()
1096     regs->common.adr_src2  = regs->common.adr_src0;  in vepu511_h265_set_hw_address()
1102         regs->common.rfpw_h_addr  = mpp_buffer_get_fd(recon_buf->buf[0]);  in vepu511_h265_set_hw_address()
1103         regs->common.rfpw_b_addr  = regs->common.rfpw_h_addr;  in vepu511_h265_set_hw_address()
1106     regs->common.rfpr_h_addr = mpp_buffer_get_fd(ref_buf->buf[0]);  in vepu511_h265_set_hw_address()
1107     regs->common.rfpr_b_addr = regs->common.rfpr_h_addr;  in vepu511_h265_set_hw_address()
1108     regs->common.colmvw_addr = mpp_buffer_get_fd(recon_buf->buf[2]);  in vepu511_h265_set_hw_address()
1109     regs->common.colmvr_addr = mpp_buffer_get_fd(ref_buf->buf[2]);  in vepu511_h265_set_hw_address()
1110     regs->common.dspw_addr = mpp_buffer_get_fd(recon_buf->buf[1]);  in vepu511_h265_set_hw_address()
1111     regs->common.dspr_addr = mpp_buffer_get_fd(ref_buf->buf[1]);  in vepu511_h265_set_hw_address()
1116         regs->common.enc_pic.mei_stor = 1;  in vepu511_h265_set_hw_address()
1117         regs->common.meiw_addr = mpp_buffer_get_fd(md_info_buf);  in vepu511_h265_set_hw_address()
1119         regs->common.enc_pic.mei_stor = 0;  in vepu511_h265_set_hw_address()
1120         regs->common.meiw_addr = 0;  in vepu511_h265_set_hw_address()
1123     regs->common.bsbt_addr = mpp_buffer_get_fd(enc_task->output);  in vepu511_h265_set_hw_address()
1125     regs->common.bsbb_addr  = regs->common.bsbt_addr;  in vepu511_h265_set_hw_address()
1126     regs->common.bsbr_addr  = regs->common.bsbt_addr;  in vepu511_h265_set_hw_address()
1127     regs->common.adr_bsbs   = regs->common.bsbt_addr;  in vepu511_h265_set_hw_address()
1129     regs->common.rfpt_h_addr = 0xffffffff;  in vepu511_h265_set_hw_address()
1130     regs->common.rfpb_h_addr = 0;  in vepu511_h265_set_hw_address()
1131     regs->common.rfpt_b_addr = 0xffffffff;  in vepu511_h265_set_hw_address()
1132     regs->common.adr_rfpb_b  = 0;  in vepu511_h265_set_hw_address()
1133     regs->common.adr_roir    = 0;  in vepu511_h265_set_hw_address()
1138     regs->common.pic_ofst.pic_ofst_y = mpp_frame_get_offset_y(task->frame);  in vepu511_h265_set_hw_address()
1139     regs->common.pic_ofst.pic_ofst_x = mpp_frame_get_offset_x(task->frame);  in vepu511_h265_set_hw_address()
1142     regs->common.adr_smear_rd = mpp_buffer_get_fd(ref_buf->buf[3]);  in vepu511_h265_set_hw_address()
1143     regs->common.adr_smear_wr = mpp_buffer_get_fd(recon_buf->buf[3]);  in vepu511_h265_set_hw_address()
1155     reg_frm->common.src_fmt.src_cfmt = fmt->format;  in vepu511_h265_set_pp_regs()
1156     reg_frm->common.src_fmt.alpha_swap = fmt->alpha_swap;  in vepu511_h265_set_pp_regs()
1157     reg_frm->common.src_fmt.rbuv_swap = fmt->rbuv_swap;  in vepu511_h265_set_pp_regs()
1159     reg_frm->common.src_fmt.out_fmt = (prep_cfg->format == MPP_FMT_YUV400) ? 0 : 1;  in vepu511_h265_set_pp_regs()
1161     reg_frm->common.src_proc.src_mirr = prep_cfg->mirroring > 0;  in vepu511_h265_set_pp_regs()
1162     reg_frm->common.src_proc.src_rot = prep_cfg->rotation;  in vepu511_h265_set_pp_regs()
1165         reg_frm->common.src_proc.rkfbcd_en = 1;  in vepu511_h265_set_pp_regs()
1173         if (reg_frm->common.src_fmt.src_cfmt == VEPU5xx_FMT_BGRA8888)  in vepu511_h265_set_pp_regs()
1175         else if (reg_frm->common.src_fmt.src_cfmt == VEPU5xx_FMT_BGR888)  in vepu511_h265_set_pp_regs()
1177         else if (reg_frm->common.src_fmt.src_cfmt == VEPU5xx_FMT_BGR565 ||  in vepu511_h265_set_pp_regs()
1178                  reg_frm->common.src_fmt.src_cfmt == VEPU5xx_FMT_YUYV422 ||  in vepu511_h265_set_pp_regs()
1179                  reg_frm->common.src_fmt.src_cfmt == VEPU5xx_FMT_UYVY422)  in vepu511_h265_set_pp_regs()
1197     if (reg_frm->common.src_fmt.src_cfmt < VEPU5xx_FMT_ARGB1555) {  in vepu511_h265_set_pp_regs()
1198         reg_frm->common.src_udfy.csc_wgt_r2y = 77;  in vepu511_h265_set_pp_regs()
1199         reg_frm->common.src_udfy.csc_wgt_g2y = 150;  in vepu511_h265_set_pp_regs()
1200         reg_frm->common.src_udfy.csc_wgt_b2y = 29;  in vepu511_h265_set_pp_regs()
1202         reg_frm->common.src_udfu.csc_wgt_r2u = -43;  in vepu511_h265_set_pp_regs()
1203         reg_frm->common.src_udfu.csc_wgt_g2u = -85;  in vepu511_h265_set_pp_regs()
1204         reg_frm->common.src_udfu.csc_wgt_b2u = 128;  in vepu511_h265_set_pp_regs()
1206         reg_frm->common.src_udfv.csc_wgt_r2v = 128;  in vepu511_h265_set_pp_regs()
1207         reg_frm->common.src_udfv.csc_wgt_g2v = -107;  in vepu511_h265_set_pp_regs()
1208         reg_frm->common.src_udfv.csc_wgt_b2v = -21;  in vepu511_h265_set_pp_regs()
1210         reg_frm->common.src_udfo.csc_ofst_y = 0;  in vepu511_h265_set_pp_regs()
1211         reg_frm->common.src_udfo.csc_ofst_u = 128;  in vepu511_h265_set_pp_regs()
1212         reg_frm->common.src_udfo.csc_ofst_v = 128;  in vepu511_h265_set_pp_regs()
1215     reg_frm->common.src_strd0.src_strd0  = stridey;  in vepu511_h265_set_pp_regs()
1216     reg_frm->common.src_strd1.src_strd1  = stridec;  in vepu511_h265_set_pp_regs()
1251     s->common.src_flt_cfg.pp_corner_filter_strength = corner_str;  in vepu511_h265_set_vsp_filtering()
1252     s->common.src_flt_cfg.pp_edge_filter_strength = edge_str;  in vepu511_h265_set_vsp_filtering()
1253     s->common.src_flt_cfg.pp_internal_filter_strength = internal_str;  in vepu511_h265_set_vsp_filtering()
1275         reg_frm->common.enc_pic.pic_qp    = rc_cfg->quality_target;  in vepu511_h265_set_rc_regs()
1277         reg_frm->common.rc_qp.rc_max_qp   = rc_cfg->quality_target;  in vepu511_h265_set_rc_regs()
1278         reg_frm->common.rc_qp.rc_min_qp   = rc_cfg->quality_target;  in vepu511_h265_set_rc_regs()
1279         reg_frm->common.rc_cfg.rc_ctu_num = 1;  in vepu511_h265_set_rc_regs()
1288         reg_frm->common.enc_pic.pic_qp      = rc_cfg->quality_target;  in vepu511_h265_set_rc_regs()
1290         reg_frm->common.rc_cfg.rc_en        = 1;  in vepu511_h265_set_rc_regs()
1291         reg_frm->common.rc_cfg.aq_en        = 1;  in vepu511_h265_set_rc_regs()
1292         reg_frm->common.rc_cfg.rc_ctu_num   = mb_wd32;  in vepu511_h265_set_rc_regs()
1294         reg_frm->common.rc_qp.rc_max_qp     = rc_cfg->quality_max;  in vepu511_h265_set_rc_regs()
1295         reg_frm->common.rc_qp.rc_min_qp     = rc_cfg->quality_min;  in vepu511_h265_set_rc_regs()
1296         reg_frm->common.rc_tgt.ctu_ebit     = ctu_target_bits_mul_16;  in vepu511_h265_set_rc_regs()
1299             reg_frm->common.rc_qp.rc_qp_range = 0;  in vepu511_h265_set_rc_regs()
1301             reg_frm->common.rc_qp.rc_qp_range = (ctx->frame_type == INTRA_FRAME) ?  in vepu511_h265_set_rc_regs()
1318                 reg_frm->common.enc_pic.pic_qp = fqp_min;  in vepu511_h265_set_rc_regs()
1320                 reg_frm->common.rc_qp.rc_qp_range = 0;  in vepu511_h265_set_rc_regs()
1931     regs->common.enc_pic.num_pic_tot_cur_hevc  = syn->sp.tot_poc_num;  in vepu511_h265_set_slice_regs()