2199         MppDevRegWrCfg wr_cfg;  in hal_h264e_vepu580_start()  local
2202         wr_cfg.reg = &regs->reg_ctl;  in hal_h264e_vepu580_start()
2203         wr_cfg.size = sizeof(regs->reg_ctl);  in hal_h264e_vepu580_start()
2204         wr_cfg.offset = VEPU580_CONTROL_CFG_OFFSET;  in hal_h264e_vepu580_start()
2208             RK_U32 *reg = (RK_U32)wr_cfg.reg;  in hal_h264e_vepu580_start()
2216         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2221         wr_cfg.reg = &regs->reg_base;  in hal_h264e_vepu580_start()
2222         wr_cfg.size = sizeof(regs->reg_base);  in hal_h264e_vepu580_start()
2223         wr_cfg.offset = VEPU580_BASE_CFG_OFFSET;  in hal_h264e_vepu580_start()
2225         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2230         wr_cfg.reg = &regs->reg_rc_klut;  in hal_h264e_vepu580_start()
2231         wr_cfg.size = sizeof(regs->reg_rc_klut);  in hal_h264e_vepu580_start()
2232         wr_cfg.offset = VEPU580_RC_KLUT_CFG_OFFSET;  in hal_h264e_vepu580_start()
2234         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2239         wr_cfg.reg = &regs->reg_s3;  in hal_h264e_vepu580_start()
2240         wr_cfg.size = sizeof(regs->reg_s3);  in hal_h264e_vepu580_start()
2241         wr_cfg.offset = VEPU580_SECTION_3_OFFSET;  in hal_h264e_vepu580_start()
2243         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2248         wr_cfg.reg = &regs->reg_rdo;  in hal_h264e_vepu580_start()
2249         wr_cfg.size = sizeof(regs->reg_rdo);  in hal_h264e_vepu580_start()
2250         wr_cfg.offset = VEPU580_RDO_CFG_OFFSET;  in hal_h264e_vepu580_start()
2252         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2258         wr_cfg.reg = &regs->reg_scl;  in hal_h264e_vepu580_start()
2259         wr_cfg.size = sizeof(regs->reg_scl);  in hal_h264e_vepu580_start()
2260         wr_cfg.offset = VEPU580_SCL_CFG_OFFSET;  in hal_h264e_vepu580_start()
2262         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()
2268         wr_cfg.reg = &regs->reg_osd;  in hal_h264e_vepu580_start()
2269         wr_cfg.size = sizeof(regs->reg_osd);  in hal_h264e_vepu580_start()
2270         wr_cfg.offset = VEPU580_OSD_OFFSET;  in hal_h264e_vepu580_start()
2272         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);  in hal_h264e_vepu580_start()