Lines Matching refs:reg_ctl
650 regs->reg_ctl.enc_strt.lkt_num = 0; in setup_vepu580_normal()
651 regs->reg_ctl.enc_strt.vepu_cmd = 1; in setup_vepu580_normal()
652 regs->reg_ctl.func_en.cke = 1; in setup_vepu580_normal()
653 regs->reg_ctl.func_en.resetn_hw_en = 1; in setup_vepu580_normal()
654 regs->reg_ctl.func_en.enc_done_tmvp_en = 1; in setup_vepu580_normal()
657 regs->reg_ctl.enc_clr.safe_clr = 0; in setup_vepu580_normal()
658 regs->reg_ctl.enc_clr.force_clr = 0; in setup_vepu580_normal()
661 regs->reg_ctl.int_en.enc_done_en = 1; in setup_vepu580_normal()
662 regs->reg_ctl.int_en.lkt_node_done_en = 1; in setup_vepu580_normal()
663 regs->reg_ctl.int_en.sclr_done_en = 1; in setup_vepu580_normal()
664 regs->reg_ctl.int_en.slc_done_en = 0; in setup_vepu580_normal()
665 regs->reg_ctl.int_en.bsf_oflw_en = 1; in setup_vepu580_normal()
666 regs->reg_ctl.int_en.brsp_otsd_en = 1; in setup_vepu580_normal()
667 regs->reg_ctl.int_en.wbus_err_en = 1; in setup_vepu580_normal()
668 regs->reg_ctl.int_en.rbus_err_en = 1; in setup_vepu580_normal()
669 regs->reg_ctl.int_en.wdg_en = 1; in setup_vepu580_normal()
672 regs->reg_ctl.int_msk.enc_done_msk = 0; in setup_vepu580_normal()
673 regs->reg_ctl.int_msk.lkt_node_done_msk = 0; in setup_vepu580_normal()
674 regs->reg_ctl.int_msk.sclr_done_msk = 0; in setup_vepu580_normal()
675 regs->reg_ctl.int_msk.slc_done_msk = 0; in setup_vepu580_normal()
676 regs->reg_ctl.int_msk.bsf_oflw_msk = 0; in setup_vepu580_normal()
677 regs->reg_ctl.int_msk.brsp_otsd_msk = 0; in setup_vepu580_normal()
678 regs->reg_ctl.int_msk.wbus_err_msk = 0; in setup_vepu580_normal()
679 regs->reg_ctl.int_msk.rbus_err_msk = 0; in setup_vepu580_normal()
680 regs->reg_ctl.int_msk.wdg_msk = 0; in setup_vepu580_normal()
682 regs->reg_ctl.enc_wdg.vs_load_thd = 0x1fffff; in setup_vepu580_normal()
683 regs->reg_ctl.enc_wdg.rfp_load_thd = 0; in setup_vepu580_normal()
686 regs->reg_ctl.dtrns_map.cmvw_bus_ordr = 0; in setup_vepu580_normal()
687 regs->reg_ctl.dtrns_map.dspw_bus_ordr = 0; in setup_vepu580_normal()
688 regs->reg_ctl.dtrns_map.rfpw_bus_ordr = 0; in setup_vepu580_normal()
689 regs->reg_ctl.dtrns_map.src_bus_edin = 0; in setup_vepu580_normal()
690 regs->reg_ctl.dtrns_map.meiw_bus_edin = 0; in setup_vepu580_normal()
691 regs->reg_ctl.dtrns_map.bsw_bus_edin = 7; in setup_vepu580_normal()
692 regs->reg_ctl.dtrns_map.lktr_bus_edin = 0; in setup_vepu580_normal()
693 regs->reg_ctl.dtrns_map.roir_bus_edin = 0; in setup_vepu580_normal()
694 regs->reg_ctl.dtrns_map.lktw_bus_edin = 0; in setup_vepu580_normal()
695 regs->reg_ctl.dtrns_map.afbc_bsize = 1; in setup_vepu580_normal()
697 regs->reg_ctl.dtrns_cfg.axi_brsp_cke = 0; in setup_vepu580_normal()
698 regs->reg_ctl.dtrns_cfg.dspr_otsd = 1; in setup_vepu580_normal()
723 regs->reg_ctl.dtrns_map.src_bus_edin = cfg.src_endian; in setup_vepu580_prep()
1698 regs->reg_ctl.int_en.slc_done_en = regs->reg_base.enc_pic.slen_fifo; in setup_vepu580_split()
1717 regs->reg_ctl.int_en.slc_done_en = 1; in setup_vepu580_split()
2202 wr_cfg.reg = ®s->reg_ctl; in hal_h264e_vepu580_start()
2203 wr_cfg.size = sizeof(regs->reg_ctl); in hal_h264e_vepu580_start()
2209 for ( i = 0; i < sizeof(regs->reg_ctl) / sizeof(RK_U32); i++) { in hal_h264e_vepu580_start()
2284 rd_cfg.reg = ®s->reg_ctl.int_sta; in hal_h264e_vepu580_start()
2321 if (regs->reg_ctl.int_sta.lkt_node_done_sta) in hal_h264e_vepu580_status_check()
2324 if (regs->reg_ctl.int_sta.enc_done_sta) in hal_h264e_vepu580_status_check()
2327 if (regs->reg_ctl.int_sta.slc_done_sta) in hal_h264e_vepu580_status_check()
2330 if (regs->reg_ctl.int_sta.sclr_done_sta) in hal_h264e_vepu580_status_check()
2333 if (regs->reg_ctl.int_sta.bsf_oflw_sta) { in hal_h264e_vepu580_status_check()
2338 if (regs->reg_ctl.int_sta.brsp_otsd_sta) { in hal_h264e_vepu580_status_check()
2343 if (regs->reg_ctl.int_sta.wbus_err_sta) { in hal_h264e_vepu580_status_check()
2348 if (regs->reg_ctl.int_sta.rbus_err_sta) { in hal_h264e_vepu580_status_check()
2353 if (regs->reg_ctl.int_sta.wdg_sta) { in hal_h264e_vepu580_status_check()