Lines Matching refs:sps
61 H264eSps *sps; member
310 ctx->sps = desc->p; in update_vepu541_syntax()
365 hw_cfg->hw_log2_max_frame_num_minus4 = ctx->sps->log2_max_frame_num_minus4; in hal_h264e_vepu541_get_task()
553 static void setup_vepu541_codec(Vepu541H264eRegSet *regs, H264eSps *sps, in setup_vepu541_codec() argument
568 regs->reg104.max_fnum = sps->log2_max_frame_num_minus4; in setup_vepu541_codec()
569 regs->reg104.drct_8x8 = sps->direct8x8_inference; in setup_vepu541_codec()
570 regs->reg104.mpoc_lm4 = sps->log2_max_poc_lsb_minus4; in setup_vepu541_codec()
769 static void setup_vepu541_rdo_pred(Vepu541H264eRegSet *regs, H264eSps *sps, in setup_vepu541_rdo_pred() argument
799 regs->reg102.rect_size = (sps->profile_idc == H264_PROFILE_BASELINE && in setup_vepu541_rdo_pred()
800 sps->level_idc <= H264_LEVEL_3_0) ? 1 : 0; in setup_vepu541_rdo_pred()
802 regs->reg102.vlc_lmt = (sps->profile_idc < H264_PROFILE_MAIN) && in setup_vepu541_rdo_pred()
816 static void setup_vepu541_rc_base(Vepu541H264eRegSet *regs, H264eSps *sps, in setup_vepu541_rc_base() argument
821 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu541_rc_base()
822 RK_S32 mb_h = sps->pic_height_in_mbs; in setup_vepu541_rc_base()
981 RK_U32 w = ctx->sps->pic_width_in_mbs * 16; in setup_vepu541_intra_refresh()
982 RK_U32 h = ctx->sps->pic_height_in_mbs * 16; in setup_vepu541_intra_refresh()
1087 RK_U32 w = ctx->sps->pic_width_in_mbs * 16; in setup_vepu541_roi()
1088 RK_U32 h = ctx->sps->pic_height_in_mbs * 16; in setup_vepu541_roi()
1239 static void setup_vepu541_me(Vepu541H264eRegSet *regs, H264eSps *sps, in setup_vepu541_me() argument
1242 RK_S32 level_idc = sps->level_idc; in setup_vepu541_me()
1243 RK_S32 pic_w = sps->pic_width_in_mbs * 16; in setup_vepu541_me()
1281 if (cime_blk_w_max / 4 * 2 > (sps->pic_width_in_mbs * 2 + 1) / 2) in setup_vepu541_me()
1282 cime_blk_w_max = (sps->pic_width_in_mbs * 2 + 1) / 2 / 2 * 4; in setup_vepu541_me()
1284 if (cime_blk_h_max / 4 > MPP_ALIGN(sps->pic_height_in_mbs * 16, 64) / 128 * 4) in setup_vepu541_me()
1285 cime_blk_h_max = MPP_ALIGN(sps->pic_height_in_mbs * 16, 64) / 128 * 16; in setup_vepu541_me()
1593 H264eSps *sps = ctx->sps; in hal_h264e_vepu541_gen_regs() local
1610 setup_vepu541_codec(regs, sps, pps, slice); in hal_h264e_vepu541_gen_regs()
1611 setup_vepu541_rdo_pred(regs, sps, pps, slice, cfg); in hal_h264e_vepu541_gen_regs()
1612 setup_vepu541_rc_base(regs, sps, slice, &cfg->hw, task->rc_task); in hal_h264e_vepu541_gen_regs()
1627 setup_vepu541_me(regs, sps, slice, ctx->is_vepu540); in hal_h264e_vepu541_gen_regs()
1807 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu541_ret_task()
1808 RK_U32 mb_h = ctx->sps->pic_height_in_mbs; in hal_h264e_vepu541_ret_task()