87     Vepu541H264eRegRet      regs_ret;  member
1695         rd_cfg.reg = &ctx->regs_ret.hw_status;  in hal_h264e_vepu541_start()
1705         rd_cfg.reg = &ctx->regs_ret.st_bsl;  in hal_h264e_vepu541_start()
1706         rd_cfg.size = sizeof(ctx->regs_ret) - 4;  in hal_h264e_vepu541_start()
1731     Vepu541H264eRegRet *regs_ret = &ctx->regs_ret;  in hal_h264e_vepu541_status_check()  local
1733     if (regs_ret->hw_status.lkt_done_sta)  in hal_h264e_vepu541_status_check()
1736     if (regs_ret->hw_status.enc_done_sta)  in hal_h264e_vepu541_status_check()
1739     if (regs_ret->hw_status.enc_slice_done_sta)  in hal_h264e_vepu541_status_check()
1742     if (regs_ret->hw_status.sclr_done_sta)  in hal_h264e_vepu541_status_check()
1745     if (regs_ret->hw_status.oflw_done_sta)  in hal_h264e_vepu541_status_check()
1748     if (regs_ret->hw_status.brsp_done_sta)  in hal_h264e_vepu541_status_check()
1751     if (regs_ret->hw_status.berr_done_sta)  in hal_h264e_vepu541_status_check()
1754     if (regs_ret->hw_status.rerr_done_sta)  in hal_h264e_vepu541_status_check()
1757     if (regs_ret->hw_status.wdg_done_sta)  in hal_h264e_vepu541_status_check()
1779         task->hw_length += ctx->regs_ret.st_bsl.bs_lgth;  in hal_h264e_vepu541_wait()
1782     mpp_packet_add_segment_info(pkt, type, offset, ctx->regs_ret.st_bsl.bs_lgth);  in hal_h264e_vepu541_wait()
1818     rc_info->quality_real = ctx->regs_ret.st_sse_qp.qp_sum / mbs;  in hal_h264e_vepu541_ret_task()
1819     rc_info->madi = (!ctx->regs_ret.st_mb_num) ? 0 :  in hal_h264e_vepu541_ret_task()
1820                     ctx->regs_ret.st_madi /  ctx->regs_ret.st_mb_num;  in hal_h264e_vepu541_ret_task()
1821     rc_info->madp = (!ctx->regs_ret.st_ctu_num) ? 0 :  in hal_h264e_vepu541_ret_task()
1822                     ctx->regs_ret.st_madp / ctx->regs_ret.st_ctu_num;  in hal_h264e_vepu541_ret_task()
1823     rc_info->iblk4_prop = (ctx->regs_ret.st_lvl4_intra_num +  in hal_h264e_vepu541_ret_task()
1824                            ctx->regs_ret.st_lvl8_intra_num +  in hal_h264e_vepu541_ret_task()
1825                            ctx->regs_ret.st_lvl16_intra_num) * 256 / mbs;  in hal_h264e_vepu541_ret_task()
1827     rc_info->sse = ((RK_S64)(ctx->regs_ret.st_sse_qp.sse_h8 & 0xff) << 32) +  in hal_h264e_vepu541_ret_task()
1828                    ctx->regs_ret.st_sse_l32.sse_l32;  in hal_h264e_vepu541_ret_task()
1829     rc_info->lvl16_inter_num = ctx->regs_ret.st_lvl16_inter_num;  in hal_h264e_vepu541_ret_task()
1830     rc_info->lvl8_inter_num  = ctx->regs_ret.st_lvl8_inter_num;  in hal_h264e_vepu541_ret_task()
1831     rc_info->lvl16_intra_num = ctx->regs_ret.st_lvl16_intra_num;  in hal_h264e_vepu541_ret_task()
1832     rc_info->lvl8_intra_num  = ctx->regs_ret.st_lvl8_intra_num;  in hal_h264e_vepu541_ret_task()
1833     rc_info->lvl4_intra_num  = ctx->regs_ret.st_lvl4_intra_num;  in hal_h264e_vepu541_ret_task()