1179         regs->reg087.sli_splt = 0;  in setup_vepu541_split()
1180         regs->reg087.sli_splt_mode = 0;  in setup_vepu541_split()
1181         regs->reg087.sli_splt_cpst = 0;  in setup_vepu541_split()
1182         regs->reg087.sli_max_num_m1 = 0;  in setup_vepu541_split()
1183         regs->reg087.sli_flsh = 0;  in setup_vepu541_split()
1184         regs->reg087.sli_splt_cnum_m1 = 0;  in setup_vepu541_split()
1190         regs->reg087.sli_splt = 1;  in setup_vepu541_split()
1191         regs->reg087.sli_splt_mode = 0;  in setup_vepu541_split()
1192         regs->reg087.sli_splt_cpst = 0;  in setup_vepu541_split()
1193         regs->reg087.sli_max_num_m1 = 500;  in setup_vepu541_split()
1194         regs->reg087.sli_flsh = 1;  in setup_vepu541_split()
1195         regs->reg087.sli_splt_cnum_m1 = 0;  in setup_vepu541_split()
1201         regs->reg087.sli_splt = 1;  in setup_vepu541_split()
1202         regs->reg087.sli_splt_mode = 1;  in setup_vepu541_split()
1203         regs->reg087.sli_splt_cpst = 0;  in setup_vepu541_split()
1204         regs->reg087.sli_max_num_m1 = 500;  in setup_vepu541_split()
1205         regs->reg087.sli_flsh = 1;  in setup_vepu541_split()
1206         regs->reg087.sli_splt_cnum_m1 = cfg->split_arg - 1;  in setup_vepu541_split()
1225     regs->reg087.sli_splt = 1;  in setup_vepu540_force_slice_split()
1226     regs->reg087.sli_splt_mode = 1;  in setup_vepu540_force_slice_split()
1227     regs->reg087.sli_splt_cpst = 0;  in setup_vepu540_force_slice_split()
1228     regs->reg087.sli_max_num_m1 = 500;  in setup_vepu540_force_slice_split()
1229     regs->reg087.sli_flsh = 1;  in setup_vepu540_force_slice_split()
1230     regs->reg087.sli_splt_cnum_m1 = mb_w - 1;  in setup_vepu540_force_slice_split()