Lines Matching refs:reg

1915     H264eVepu511Sqi *reg = &regs->reg_sqi;  in setup_vepu511_anti_flicker()  local
1931 p_skip = &reg->rdo_b16_skip; in setup_vepu511_anti_flicker()
1942 p_no_skip = &reg->rdo_b16_inter; in setup_vepu511_anti_flicker()
1951 p_no_skip = &reg->rdo_b16_intra; in setup_vepu511_anti_flicker()
1960 reg->rdo_b16_intra_atf_cnt_thd.thd0 = 1; in setup_vepu511_anti_flicker()
1961 reg->rdo_b16_intra_atf_cnt_thd.thd1 = 4; in setup_vepu511_anti_flicker()
1962 reg->rdo_b16_intra_atf_cnt_thd.thd2 = 1; in setup_vepu511_anti_flicker()
1963 reg->rdo_b16_intra_atf_cnt_thd.thd3 = 4; in setup_vepu511_anti_flicker()
1965 reg->rdo_atf_resi_thd.big_th0 = 16; in setup_vepu511_anti_flicker()
1966 reg->rdo_atf_resi_thd.big_th1 = 16; in setup_vepu511_anti_flicker()
1967 reg->rdo_atf_resi_thd.small_th0 = 8; in setup_vepu511_anti_flicker()
1968 reg->rdo_atf_resi_thd.small_th1 = 8; in setup_vepu511_anti_flicker()
1974 H264eVepu511Sqi *reg = &regs->reg_sqi; in setup_vepu511_anti_smear() local
1996 reg->smear_opt_cfg.rdo_smear_en = ctx->qpmap_en; in setup_vepu511_anti_smear()
1998 reg->smear_opt_cfg.rdo_smear_lvl16_multi = smear_multi[flg3]; in setup_vepu511_anti_smear()
2000 reg->smear_opt_cfg.rdo_smear_lvl16_multi = flg0 ? 9 : 12; in setup_vepu511_anti_smear()
2002 reg->smear_opt_cfg.rdo_smear_en = 0; in setup_vepu511_anti_smear()
2003 reg->smear_opt_cfg.rdo_smear_lvl16_multi = 16; in setup_vepu511_anti_smear()
2033 reg->smear_opt_cfg.rdo_smear_dlt_qp = delta_qp; in setup_vepu511_anti_smear()
2037 reg->smear_opt_cfg.stated_mode = 1; in setup_vepu511_anti_smear()
2039 reg->smear_opt_cfg.stated_mode = 2; in setup_vepu511_anti_smear()
2041 reg->smear_madp_thd0.madp_cur_thd0 = 0; in setup_vepu511_anti_smear()
2042 reg->smear_madp_thd0.madp_cur_thd1 = flg2 ? 48 : 24; in setup_vepu511_anti_smear()
2043 reg->smear_madp_thd1.madp_cur_thd2 = flg2 ? 64 : 48; in setup_vepu511_anti_smear()
2044 reg->smear_madp_thd1.madp_cur_thd3 = flg2 ? 72 : 64; in setup_vepu511_anti_smear()
2045 reg->smear_madp_thd2.madp_around_thd0 = flg2 ? 4095 : 16; in setup_vepu511_anti_smear()
2046 reg->smear_madp_thd2.madp_around_thd1 = 32; in setup_vepu511_anti_smear()
2047 reg->smear_madp_thd3.madp_around_thd2 = 48; in setup_vepu511_anti_smear()
2048 reg->smear_madp_thd3.madp_around_thd3 = flg2 ? 0 : 96; in setup_vepu511_anti_smear()
2049 reg->smear_madp_thd4.madp_around_thd4 = 48; in setup_vepu511_anti_smear()
2050 reg->smear_madp_thd4.madp_around_thd5 = 24; in setup_vepu511_anti_smear()
2051 reg->smear_madp_thd5.madp_ref_thd0 = flg2 ? 64 : 96; in setup_vepu511_anti_smear()
2052 reg->smear_madp_thd5.madp_ref_thd1 = 48; in setup_vepu511_anti_smear()
2054 reg->smear_cnt_thd0.cnt_cur_thd0 = flg2 ? 2 : 1; in setup_vepu511_anti_smear()
2055 reg->smear_cnt_thd0.cnt_cur_thd1 = flg2 ? 5 : 3; in setup_vepu511_anti_smear()
2056 reg->smear_cnt_thd0.cnt_cur_thd2 = 1; in setup_vepu511_anti_smear()
2057 reg->smear_cnt_thd0.cnt_cur_thd3 = 3; in setup_vepu511_anti_smear()
2058 reg->smear_cnt_thd1.cnt_around_thd0 = 1; in setup_vepu511_anti_smear()
2059 reg->smear_cnt_thd1.cnt_around_thd1 = 4; in setup_vepu511_anti_smear()
2060 reg->smear_cnt_thd1.cnt_around_thd2 = 1; in setup_vepu511_anti_smear()
2061 reg->smear_cnt_thd1.cnt_around_thd3 = 4; in setup_vepu511_anti_smear()
2062 reg->smear_cnt_thd2.cnt_around_thd4 = 0; in setup_vepu511_anti_smear()
2063 reg->smear_cnt_thd2.cnt_around_thd5 = 3; in setup_vepu511_anti_smear()
2064 reg->smear_cnt_thd2.cnt_around_thd6 = 0; in setup_vepu511_anti_smear()
2065 reg->smear_cnt_thd2.cnt_around_thd7 = 3; in setup_vepu511_anti_smear()
2066 reg->smear_cnt_thd3.cnt_ref_thd0 = 1; in setup_vepu511_anti_smear()
2067 reg->smear_cnt_thd3.cnt_ref_thd1 = 3; in setup_vepu511_anti_smear()
2069 reg->smear_resi_thd0.resi_small_cur_th0 = 6; in setup_vepu511_anti_smear()
2070 reg->smear_resi_thd0.resi_big_cur_th0 = 9; in setup_vepu511_anti_smear()
2071 reg->smear_resi_thd0.resi_small_cur_th1 = 6; in setup_vepu511_anti_smear()
2072 reg->smear_resi_thd0.resi_big_cur_th1 = 9; in setup_vepu511_anti_smear()
2073 reg->smear_resi_thd1.resi_small_around_th0 = 6; in setup_vepu511_anti_smear()
2074 reg->smear_resi_thd1.resi_big_around_th0 = 11; in setup_vepu511_anti_smear()
2075 reg->smear_resi_thd1.resi_small_around_th1 = 6; in setup_vepu511_anti_smear()
2076 reg->smear_resi_thd1.resi_big_around_th1 = 8; in setup_vepu511_anti_smear()
2077 reg->smear_resi_thd2.resi_small_around_th2 = 9; in setup_vepu511_anti_smear()
2078 reg->smear_resi_thd2.resi_big_around_th2 = 20; in setup_vepu511_anti_smear()
2079 reg->smear_resi_thd2.resi_small_around_th3 = 6; in setup_vepu511_anti_smear()
2080 reg->smear_resi_thd2.resi_big_around_th3 = 20; in setup_vepu511_anti_smear()
2081 reg->smear_resi_thd3.resi_small_ref_th0 = 7; in setup_vepu511_anti_smear()
2082 reg->smear_resi_thd3.resi_big_ref_th0 = 16; in setup_vepu511_anti_smear()
2083 reg->smear_resi_thd4.resi_th0 = flg2 ? 0 : 10; in setup_vepu511_anti_smear()
2084 reg->smear_resi_thd4.resi_th1 = flg2 ? 0 : 6; in setup_vepu511_anti_smear()
2086 reg->smear_st_thd.madp_cnt_th0 = flg2 ? 0 : 1; in setup_vepu511_anti_smear()
2087 reg->smear_st_thd.madp_cnt_th1 = flg2 ? 0 : 5; in setup_vepu511_anti_smear()
2088 reg->smear_st_thd.madp_cnt_th2 = flg2 ? 0 : 1; in setup_vepu511_anti_smear()
2089 reg->smear_st_thd.madp_cnt_th3 = flg2 ? 0 : 3; in setup_vepu511_anti_smear()
2194 wr_cfg.reg = &regs->reg_ctl; in hal_h264e_vepu511_start()
2200 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu511_start() local
2202 mpp_log("reg[%d] = 0x%08x\n", i, reg[i]); in hal_h264e_vepu511_start()
2213 wr_cfg.reg = &regs->reg_frm; in hal_h264e_vepu511_start()
2223 wr_cfg.reg = &regs->reg_rc_roi; in hal_h264e_vepu511_start()
2233 wr_cfg.reg = &regs->reg_param; in hal_h264e_vepu511_start()
2243 wr_cfg.reg = &regs->reg_sqi; in hal_h264e_vepu511_start()
2253 wr_cfg.reg = &regs->reg_scl; in hal_h264e_vepu511_start()
2263 wr_cfg.reg = &regs->reg_osd; in hal_h264e_vepu511_start()
2279 rd_cfg.reg = &regs->reg_ctl.int_sta; in hal_h264e_vepu511_start()
2288 rd_cfg.reg = &regs->reg_st; in hal_h264e_vepu511_start()