102     MppDevRegOffCfgs        *offsets;  member
255     if (p->offsets) {  in hal_h264e_vepu511_deinit()
256         mpp_dev_multi_offset_deinit(p->offsets);  in hal_h264e_vepu511_deinit()
257         p->offsets = NULL;  in hal_h264e_vepu511_deinit()
376     mpp_dev_multi_offset_init(&p->offsets, 24);  in hal_h264e_vepu511_init()
837     mpp_dev_multi_offset_update(ctx->offsets, 164, width_align * height_align);  in vepu511_h264e_save_pass1_patch()
874     mpp_dev_multi_offset_update(ctx->offsets, 161, width_align * height_align);  in vepu511_h264e_use_pass1_patch()
1268 static void setup_vepu511_io_buf(HalVepu511RegSet *regs, MppDevRegOffCfgs *offsets,  in setup_vepu511_io_buf()  argument
1349     mpp_dev_multi_offset_update(offsets, 161, off_in[0]);  in setup_vepu511_io_buf()
1350     mpp_dev_multi_offset_update(offsets, 162, off_in[1]);  in setup_vepu511_io_buf()
1351     mpp_dev_multi_offset_update(offsets, 172, siz_out);  in setup_vepu511_io_buf()
1352     mpp_dev_multi_offset_update(offsets, 174, off_out);  in setup_vepu511_io_buf()
1537     mpp_dev_multi_offset_update(ctx->offsets, 164, fbc_hdr_size);  in setup_vepu511_recn_refr()
1538     mpp_dev_multi_offset_update(ctx->offsets, 166, fbc_hdr_size);  in setup_vepu511_recn_refr()
1757     mpp_dev_multi_offset_update(ctx->offsets, 178, offset);  in setup_vepu511_ext_line_buf()
2149     setup_vepu511_io_buf(regs, ctx->offsets, task);  in hal_h264e_vepu511_gen_regs()
2273         ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_OFFS, ctx->offsets);  in hal_h264e_vepu511_start()
2587     mpp_dev_multi_offset_reset(ctx->offsets);  in hal_h264e_vepu511_ret_task()