633     regs->reg_ctl.enc_strt.lkt_num           = 0;  in setup_vepu510_normal()
634     regs->reg_ctl.enc_strt.vepu_cmd          = 1;  in setup_vepu510_normal()
636     regs->reg_ctl.opt_strg.cke                = 1;  in setup_vepu510_normal()
637     regs->reg_ctl.opt_strg.resetn_hw_en       = 1;  in setup_vepu510_normal()
640     regs->reg_ctl.enc_clr.safe_clr           = 0;  in setup_vepu510_normal()
641     regs->reg_ctl.enc_clr.force_clr          = 0;  in setup_vepu510_normal()
644     regs->reg_ctl.int_en.enc_done_en        = 1;  in setup_vepu510_normal()
645     regs->reg_ctl.int_en.lkt_node_done_en   = 1;  in setup_vepu510_normal()
646     regs->reg_ctl.int_en.sclr_done_en       = 1;  in setup_vepu510_normal()
647     regs->reg_ctl.int_en.vslc_done_en       = 0;  in setup_vepu510_normal()
648     regs->reg_ctl.int_en.vbsf_oflw_en       = 1;  in setup_vepu510_normal()
649     regs->reg_ctl.int_en.vbuf_lens_en       = 1;  in setup_vepu510_normal()
650     regs->reg_ctl.int_en.enc_err_en         = 1;  in setup_vepu510_normal()
652     regs->reg_ctl.int_en.wdg_en             = 1;  in setup_vepu510_normal()
653     regs->reg_ctl.int_en.vsrc_err_en        = 1;  in setup_vepu510_normal()
654     regs->reg_ctl.int_en.wdg_en             = 1;  in setup_vepu510_normal()
655     regs->reg_ctl.int_en.lkt_err_int_en     = 1;  in setup_vepu510_normal()
656     regs->reg_ctl.int_en.lkt_err_stop_en    = 1;  in setup_vepu510_normal()
657     regs->reg_ctl.int_en.lkt_force_stop_en  = 1;  in setup_vepu510_normal()
658     regs->reg_ctl.int_en.jslc_done_en       = 1;  in setup_vepu510_normal()
659     regs->reg_ctl.int_en.jbsf_oflw_en       = 1;  in setup_vepu510_normal()
660     regs->reg_ctl.int_en.jbuf_lens_en       = 1;  in setup_vepu510_normal()
661     regs->reg_ctl.int_en.dvbm_err_en        = 0;  in setup_vepu510_normal()
664     regs->reg_ctl.int_msk.enc_done_msk        = 0;  in setup_vepu510_normal()
665     regs->reg_ctl.int_msk.lkt_node_done_msk   = 0;  in setup_vepu510_normal()
666     regs->reg_ctl.int_msk.sclr_done_msk       = 0;  in setup_vepu510_normal()
667     regs->reg_ctl.int_msk.vslc_done_msk       = 0;  in setup_vepu510_normal()
668     regs->reg_ctl.int_msk.vbsf_oflw_msk       = 0;  in setup_vepu510_normal()
669     regs->reg_ctl.int_msk.vbuf_lens_msk       = 0;  in setup_vepu510_normal()
670     regs->reg_ctl.int_msk.enc_err_msk         = 0;  in setup_vepu510_normal()
671     regs->reg_ctl.int_msk.vsrc_err_msk        = 0;  in setup_vepu510_normal()
672     regs->reg_ctl.int_msk.wdg_msk             = 0;  in setup_vepu510_normal()
673     regs->reg_ctl.int_msk.lkt_err_int_msk     = 0;  in setup_vepu510_normal()
674     regs->reg_ctl.int_msk.lkt_err_stop_msk    = 0;  in setup_vepu510_normal()
675     regs->reg_ctl.int_msk.lkt_force_stop_msk  = 0;  in setup_vepu510_normal()
676     regs->reg_ctl.int_msk.jslc_done_msk       = 0;  in setup_vepu510_normal()
677     regs->reg_ctl.int_msk.jbsf_oflw_msk       = 0;  in setup_vepu510_normal()
678     regs->reg_ctl.int_msk.jbuf_lens_msk       = 0;  in setup_vepu510_normal()
679     regs->reg_ctl.int_msk.dvbm_err_msk        = 0;  in setup_vepu510_normal()
684     regs->reg_ctl.enc_wdg.vs_load_thd       = 0;  in setup_vepu510_normal()
687     regs->reg_ctl.dtrns_map.jpeg_bus_edin      = 0;  in setup_vepu510_normal()
688     regs->reg_ctl.dtrns_map.src_bus_edin       = 0;  in setup_vepu510_normal()
689     regs->reg_ctl.dtrns_map.meiw_bus_edin      = 0;  in setup_vepu510_normal()
690     regs->reg_ctl.dtrns_map.bsw_bus_edin       = 7;  in setup_vepu510_normal()
691     regs->reg_ctl.dtrns_map.lktw_bus_edin      = 0;  in setup_vepu510_normal()
692     regs->reg_ctl.dtrns_map.rec_nfbc_bus_edin  = 0;  in setup_vepu510_normal()
694     regs->reg_ctl.dtrns_cfg.axi_brsp_cke   = 0;  in setup_vepu510_normal()
720     regs->reg_ctl.dtrns_map.src_bus_edin = cfg.src_endian;  in setup_vepu510_prep()
1572         regs->reg_ctl.int_en.vslc_done_en         = reg_frm->common.enc_pic.slen_fifo;  in setup_vepu510_split()
1590             regs->reg_ctl.int_en.vslc_done_en = 1;  in setup_vepu510_split()
2243         wr_cfg.reg = &regs->reg_ctl;  in hal_h264e_vepu510_start()
2244         wr_cfg.size = sizeof(regs->reg_ctl);  in hal_h264e_vepu510_start()
2250             for ( i = 0; i < sizeof(regs->reg_ctl) / sizeof(RK_U32); i++) {  in hal_h264e_vepu510_start()
2318         rd_cfg.reg = &regs->reg_ctl.int_sta;  in hal_h264e_vepu510_start()
2354     if (regs->reg_ctl.int_sta.lkt_node_done_sta)  in hal_h264e_vepu510_status_check()
2357     if (regs->reg_ctl.int_sta.enc_done_sta)  in hal_h264e_vepu510_status_check()
2360     if (regs->reg_ctl.int_sta.vslc_done_sta)  in hal_h264e_vepu510_status_check()
2363     if (regs->reg_ctl.int_sta.sclr_done_sta)  in hal_h264e_vepu510_status_check()
2366     if (regs->reg_ctl.int_sta.vbsf_oflw_sta) {  in hal_h264e_vepu510_status_check()
2371     if (regs->reg_ctl.int_sta.vbuf_lens_sta) {  in hal_h264e_vepu510_status_check()
2376     if (regs->reg_ctl.int_sta.enc_err_sta) {  in hal_h264e_vepu510_status_check()
2381     if (regs->reg_ctl.int_sta.wdg_sta) {  in hal_h264e_vepu510_status_check()