Lines Matching refs:enc_pic
860 reg_frm->common.enc_pic.cur_frm_ref = 1; in vepu510_h264e_save_pass1_patch()
863 reg_frm->common.enc_pic.rec_fbc_dis = 1; in vepu510_h264e_save_pass1_patch()
869 reg_frm->common.enc_pic.slen_fifo = 0; in vepu510_h264e_save_pass1_patch()
919 reg_frm->common.enc_pic.enc_stnd = 0; in setup_vepu510_codec()
920 reg_frm->common.enc_pic.cur_frm_ref = slice->nal_reference_idc > 0; in setup_vepu510_codec()
921 reg_frm->common.enc_pic.bs_scp = 1; in setup_vepu510_codec()
1204 reg_frm->common.enc_pic.pic_qp = rc_info->quality_target; in setup_vepu510_rc_base()
1218 reg_frm->common.enc_pic.pic_qp = qp_target; in setup_vepu510_rc_base()
1248 reg_frm->common.enc_pic.pic_qp = fqp_min; in setup_vepu510_rc_base()
1560 reg_frm->common.enc_pic.slen_fifo = 0; in setup_vepu510_split()
1571 reg_frm->common.enc_pic.slen_fifo = cfg->split_out ? 1 : 0; in setup_vepu510_split()
1572 regs->reg_ctl.int_en.vslc_done_en = reg_frm->common.enc_pic.slen_fifo; in setup_vepu510_split()
1587 reg_frm->common.enc_pic.slen_fifo = cfg->split_out ? 1 : 0; in setup_vepu510_split()
1589 (regs->reg_frm.common.enc_pic.slen_fifo && (slice_num > VEPU510_SLICE_FIFO_LEN))) in setup_vepu510_split()
2197 reg_frm->common.enc_pic.mei_stor = task->md_info ? 1 : 0; in hal_h264e_vepu510_gen_regs()