248     Vepu541OsdReg *regs = (Vepu541OsdReg *)(cfg->reg_base + (size_t)VEPU541_OSD_CFG_OFFSET);  in vepu541_set_osd()  local
275         regs->reg112.osd_plt_cks = 1;  in vepu541_set_osd()
276         regs->reg112.osd_plt_typ = VEPU5xx_OSD_PLT_TYPE_USERDEF;  in vepu541_set_osd()
278         regs->reg112.osd_plt_cks = 0;  in vepu541_set_osd()
279         regs->reg112.osd_plt_typ = VEPU5xx_OSD_PLT_TYPE_DEFAULT;  in vepu541_set_osd()
282     regs->reg112.osd_e = 0;  in vepu541_set_osd()
283     regs->reg112.osd_inv_e = 0;  in vepu541_set_osd()
291         regs->reg112.osd_e      |= tmp->enable << i;  in vepu541_set_osd()
292         regs->reg112.osd_inv_e  |= tmp->inverse << i;  in vepu541_set_osd()
295             Vepu541OsdPos *pos = &regs->osd_pos[i];  in vepu541_set_osd()
311             regs->osd_addr[i] = fd;  in vepu541_set_osd()
326     SET_OSD_INV_THR(0, regs->reg113, region);  in vepu541_set_osd()
327     SET_OSD_INV_THR(1, regs->reg113, region);  in vepu541_set_osd()
328     SET_OSD_INV_THR(2, regs->reg113, region);  in vepu541_set_osd()
329     SET_OSD_INV_THR(3, regs->reg113, region);  in vepu541_set_osd()
330     SET_OSD_INV_THR(4, regs->reg113, region);  in vepu541_set_osd()
331     SET_OSD_INV_THR(5, regs->reg113, region);  in vepu541_set_osd()
332     SET_OSD_INV_THR(6, regs->reg113, region);  in vepu541_set_osd()
333     SET_OSD_INV_THR(7, regs->reg113, region);  in vepu541_set_osd()
447     Vepu540OsdReg *regs = (Vepu540OsdReg *)(cfg->reg_base + (size_t)VEPU540_OSD_CFG_OFFSET);  in vepu540_set_osd()  local
473         regs->reg112.osd_plt_cks = 1;  in vepu540_set_osd()
474         regs->reg112.osd_plt_typ = VEPU5xx_OSD_PLT_TYPE_USERDEF;  in vepu540_set_osd()
476         regs->reg112.osd_plt_cks = 0;  in vepu540_set_osd()
477         regs->reg112.osd_plt_typ = VEPU5xx_OSD_PLT_TYPE_DEFAULT;  in vepu540_set_osd()
480     regs->reg112.osd_e = 0;  in vepu540_set_osd()
481     regs->reg112.osd_lu_inv_en = 0;  in vepu540_set_osd()
482     regs->reg094.osd_ch_inv_en = 0;  in vepu540_set_osd()
483     regs->reg094.osd_lu_inv_msk = 0;  in vepu540_set_osd()
491         regs->reg112.osd_e          |= tmp->enable << k;  in vepu540_set_osd()
492         regs->reg112.osd_lu_inv_en  |= (tmp->inverse) ? (1 << k) : 0;  in vepu540_set_osd()
493         regs->reg094.osd_ch_inv_en  |= (tmp->inverse) ? (1 << k) : 0;  in vepu540_set_osd()
496             Vepu541OsdPos *pos = &regs->osd_pos[k];  in vepu540_set_osd()
512             regs->osd_addr[k] = fd;  in vepu540_set_osd()
527     SET_OSD_INV_THR(0, regs->reg113, region);  in vepu540_set_osd()
528     SET_OSD_INV_THR(1, regs->reg113, region);  in vepu540_set_osd()
529     SET_OSD_INV_THR(2, regs->reg113, region);  in vepu540_set_osd()
530     SET_OSD_INV_THR(3, regs->reg113, region);  in vepu540_set_osd()
531     SET_OSD_INV_THR(4, regs->reg113, region);  in vepu540_set_osd()
532     SET_OSD_INV_THR(5, regs->reg113, region);  in vepu540_set_osd()
533     SET_OSD_INV_THR(6, regs->reg113, region);  in vepu540_set_osd()
534     SET_OSD_INV_THR(7, regs->reg113, region);  in vepu540_set_osd()