58     RK_S32          width;  member
380                                  RK_S32 width, RK_S32 height, void* data)  in vp9d_refine_rcb_size()  argument
391     width = MPP_ALIGN(width, VP9_CTU_SIZE);  in vp9d_refine_rcb_size()
394     if (width > 4096)  in vp9d_refine_rcb_size()
395         rcb_bits = ((width + 63) / 64) * 250;  in vp9d_refine_rcb_size()
402     rcb_bits = ((width + 63) / 64) * 2368;  in vp9d_refine_rcb_size()
411     rcb_bits = MPP_ALIGN(width, 512) * (bit_depth + 2);  in vp9d_refine_rcb_size()
422     if (width > 4096)  in vp9d_refine_rcb_size()
424     rcb_bits = (RK_U32)(MPP_ALIGN(width, 64) * (41 * bit_depth + 13));  in vp9d_refine_rcb_size()
451     RK_S32 width  = vp9_ver_align(pic_param->width);  in hal_vp9d_rcb_info_update()  local
456         hw_ctx->width != width ||  in hal_vp9d_rcb_info_update()
459         hw_ctx->rcb_buf_size = vdpu383_get_rcb_buf_size(hw_ctx->rcb_info, width, height);  in hal_vp9d_rcb_info_update()
461         vp9d_refine_rcb_size(hw_ctx->rcb_info, width, height, pic_param);  in hal_vp9d_rcb_info_update()
489         hw_ctx->width          = width;  in hal_vp9d_rcb_info_update()
517     mpp_put_bits(&bp, pp->width, 16);  in prepare_uncompress_header()
570                                     pp->width == hw_ctx->ls_info.last_width &&  in prepare_uncompress_header()
614         RK_U32 last_widthheight_eqcur = pp->width == hw_ctx->ls_info.last_width &&  in prepare_uncompress_header()
649                             i, pp->log2_tile_cols, MPP_ALIGN(pp->width, 64) / 64);  in prepare_uncompress_header()
711     RK_S32 mv_size = pic_param->width * pic_param->height / 2;  in hal_vp9d_vdpu383_gen_regs()
934 …(pic_param->width != hw_ctx->ls_info.last_width || pic_param->height != hw_ctx->ls_info.last_heigh…  in hal_vp9d_vdpu383_gen_regs()
1064     hw_ctx->ls_info.last_width = pic_param->width;  in hal_vp9d_vdpu383_gen_regs()
1074                      pic_param->width, pic_param->height,  in hal_vp9d_vdpu383_gen_regs()