Lines Matching refs:hw_ctx
109 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_alloc_res() local
115 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_loop_base[i], PROB_SIZE); in hal_vp9d_alloc_res()
120 mpp_buffer_attach_dev(hw_ctx->prob_loop_base[i], p_hal->dev); in hal_vp9d_alloc_res()
122 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_default_base, PROB_SIZE); in hal_vp9d_alloc_res()
127 mpp_buffer_attach_dev(hw_ctx->prob_default_base, p_hal->dev); in hal_vp9d_alloc_res()
129 ret = mpp_buffer_get(p_hal->group, &hw_ctx->segid_cur_base, MAX_SEGMAP_SIZE); in hal_vp9d_alloc_res()
134 mpp_buffer_attach_dev(hw_ctx->segid_cur_base, p_hal->dev); in hal_vp9d_alloc_res()
135 ret = mpp_buffer_get(p_hal->group, &hw_ctx->segid_last_base, MAX_SEGMAP_SIZE); in hal_vp9d_alloc_res()
140 mpp_buffer_attach_dev(hw_ctx->segid_last_base, p_hal->dev); in hal_vp9d_alloc_res()
145 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu383Vp9dRegSet)); in hal_vp9d_alloc_res()
147 &hw_ctx->g_buf[i].global_base, GBL_SIZE); in hal_vp9d_alloc_res()
148 mpp_buffer_attach_dev(hw_ctx->g_buf[i].global_base, p_hal->dev); in hal_vp9d_alloc_res()
154 &hw_ctx->g_buf[i].probe_base, PROB_KF_SIZE); in hal_vp9d_alloc_res()
159 mpp_buffer_attach_dev(hw_ctx->g_buf[i].probe_base, p_hal->dev); in hal_vp9d_alloc_res()
161 &hw_ctx->g_buf[i].count_base, COUNT_SIZE); in hal_vp9d_alloc_res()
166 mpp_buffer_attach_dev(hw_ctx->g_buf[i].count_base, p_hal->dev); in hal_vp9d_alloc_res()
169 hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(Vdpu383Vp9dRegSet)); in hal_vp9d_alloc_res()
170 ret = mpp_buffer_get(p_hal->group, &hw_ctx->global_base, PROB_SIZE); in hal_vp9d_alloc_res()
175 mpp_buffer_attach_dev(hw_ctx->global_base, p_hal->dev); in hal_vp9d_alloc_res()
177 ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, PROB_KF_SIZE); in hal_vp9d_alloc_res()
182 mpp_buffer_attach_dev(hw_ctx->probe_base, p_hal->dev); in hal_vp9d_alloc_res()
184 ret = mpp_buffer_get(p_hal->group, &hw_ctx->count_base, COUNT_SIZE); in hal_vp9d_alloc_res()
189 mpp_buffer_attach_dev(hw_ctx->count_base, p_hal->dev); in hal_vp9d_alloc_res()
197 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_release_res() local
201 if (hw_ctx->prob_default_base) { in hal_vp9d_release_res()
202 ret = mpp_buffer_put(hw_ctx->prob_default_base); in hal_vp9d_release_res()
208 if (hw_ctx->segid_cur_base) { in hal_vp9d_release_res()
209 ret = mpp_buffer_put(hw_ctx->segid_cur_base); in hal_vp9d_release_res()
215 if (hw_ctx->segid_last_base) { in hal_vp9d_release_res()
216 ret = mpp_buffer_put(hw_ctx->segid_last_base); in hal_vp9d_release_res()
223 if (hw_ctx->prob_loop_base[i]) { in hal_vp9d_release_res()
224 ret = mpp_buffer_put(hw_ctx->prob_loop_base[i]); in hal_vp9d_release_res()
233 if (hw_ctx->g_buf[i].global_base) { in hal_vp9d_release_res()
234 ret = mpp_buffer_put(hw_ctx->g_buf[i].global_base); in hal_vp9d_release_res()
240 if (hw_ctx->g_buf[i].probe_base) { in hal_vp9d_release_res()
241 ret = mpp_buffer_put(hw_ctx->g_buf[i].probe_base); in hal_vp9d_release_res()
247 if (hw_ctx->g_buf[i].count_base) { in hal_vp9d_release_res()
248 ret = mpp_buffer_put(hw_ctx->g_buf[i].count_base); in hal_vp9d_release_res()
254 if (hw_ctx->g_buf[i].hw_regs) { in hal_vp9d_release_res()
255 mpp_free(hw_ctx->g_buf[i].hw_regs); in hal_vp9d_release_res()
256 hw_ctx->g_buf[i].hw_regs = NULL; in hal_vp9d_release_res()
258 if (hw_ctx->g_buf[i].rcb_buf) { in hal_vp9d_release_res()
259 ret = mpp_buffer_put(hw_ctx->g_buf[i].rcb_buf); in hal_vp9d_release_res()
267 if (hw_ctx->global_base) { in hal_vp9d_release_res()
268 ret = mpp_buffer_put(hw_ctx->global_base); in hal_vp9d_release_res()
274 if (hw_ctx->probe_base) { in hal_vp9d_release_res()
275 ret = mpp_buffer_put(hw_ctx->probe_base); in hal_vp9d_release_res()
281 if (hw_ctx->count_base) { in hal_vp9d_release_res()
282 ret = mpp_buffer_put(hw_ctx->count_base); in hal_vp9d_release_res()
288 if (hw_ctx->hw_regs) { in hal_vp9d_release_res()
289 mpp_free(hw_ctx->hw_regs); in hal_vp9d_release_res()
290 hw_ctx->hw_regs = NULL; in hal_vp9d_release_res()
292 if (hw_ctx->rcb_buf) { in hal_vp9d_release_res()
293 ret = mpp_buffer_put(hw_ctx->rcb_buf); in hal_vp9d_release_res()
301 if (hw_ctx->cmv_bufs) { in hal_vp9d_release_res()
302 ret = hal_bufs_deinit(hw_ctx->cmv_bufs); in hal_vp9d_release_res()
308 if (hw_ctx->origin_bufs) { in hal_vp9d_release_res()
309 ret = hal_bufs_deinit(hw_ctx->origin_bufs); in hal_vp9d_release_res()
314 hw_ctx->origin_bufs = NULL; in hal_vp9d_release_res()
334 MPP_FREE(p_hal->hw_ctx); in hal_vp9d_vdpu383_deinit()
343 MEM_CHECK(ret, p_hal->hw_ctx = mpp_calloc_size(void, sizeof(Vdpu383Vp9dCtx))); in hal_vp9d_vdpu383_init()
344 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_init() local
347 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu383_init()
348 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu383_init()
366 hw_ctx->last_segid_flag = 1; in hal_vp9d_vdpu383_init()
446 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_rcb_info_update() local
454 if (hw_ctx->num_row_tiles != num_tiles || in hal_vp9d_rcb_info_update()
455 hw_ctx->bit_depth != bit_depth || in hal_vp9d_rcb_info_update()
456 hw_ctx->width != width || in hal_vp9d_rcb_info_update()
457 hw_ctx->height != height) { in hal_vp9d_rcb_info_update()
459 hw_ctx->rcb_buf_size = vdpu383_get_rcb_buf_size(hw_ctx->rcb_info, width, height); in hal_vp9d_rcb_info_update()
461 vp9d_refine_rcb_size(hw_ctx->rcb_info, width, height, pic_param); in hal_vp9d_rcb_info_update()
466 for (i = 0; i < MPP_ARRAY_ELEMS(hw_ctx->g_buf); i++) { in hal_vp9d_rcb_info_update()
467 MppBuffer rcb_buf = hw_ctx->g_buf[i].rcb_buf; in hal_vp9d_rcb_info_update()
471 hw_ctx->g_buf[i].rcb_buf = NULL; in hal_vp9d_rcb_info_update()
473 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
474 hw_ctx->g_buf[i].rcb_buf = rcb_buf; in hal_vp9d_rcb_info_update()
477 MppBuffer rcb_buf = hw_ctx->rcb_buf; in hal_vp9d_rcb_info_update()
483 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
484 hw_ctx->rcb_buf = rcb_buf; in hal_vp9d_rcb_info_update()
487 hw_ctx->num_row_tiles = num_tiles; in hal_vp9d_rcb_info_update()
488 hw_ctx->bit_depth = bit_depth; in hal_vp9d_rcb_info_update()
489 hw_ctx->width = width; in hal_vp9d_rcb_info_update()
490 hw_ctx->height = height; in hal_vp9d_rcb_info_update()
507 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in prepare_uncompress_header() local
570 pp->width == hw_ctx->ls_info.last_width && in prepare_uncompress_header()
571 pp->height == hw_ctx->ls_info.last_height && in prepare_uncompress_header()
572 !hw_ctx->ls_info.last_intra_only && in prepare_uncompress_header()
573 hw_ctx->ls_info.last_show_frame; in prepare_uncompress_header()
603 mpp_put_bits(&bp, hw_ctx->ls_info.last_mode_deltas[0], 7); in prepare_uncompress_header()
604 mpp_put_bits(&bp, hw_ctx->ls_info.last_mode_deltas[1], 7); in prepare_uncompress_header()
605 mpp_put_bits(&bp, hw_ctx->ls_info.last_ref_deltas[0], 7); in prepare_uncompress_header()
606 mpp_put_bits(&bp, hw_ctx->ls_info.last_ref_deltas[1], 7); in prepare_uncompress_header()
607 mpp_put_bits(&bp, hw_ctx->ls_info.last_ref_deltas[2], 7); in prepare_uncompress_header()
608 mpp_put_bits(&bp, hw_ctx->ls_info.last_ref_deltas[3], 7); in prepare_uncompress_header()
609 mpp_put_bits(&bp, hw_ctx->ls_info.segmentation_enable_flag_last, 1); in prepare_uncompress_header()
611 mpp_put_bits(&bp, hw_ctx->ls_info.last_show_frame, 1); in prepare_uncompress_header()
614 RK_U32 last_widthheight_eqcur = pp->width == hw_ctx->ls_info.last_width && in prepare_uncompress_header()
615 pp->height == hw_ctx->ls_info.last_height; in prepare_uncompress_header()
619 mpp_put_bits(&bp, hw_ctx->ls_info.color_space_last, 3); in prepare_uncompress_header()
621 mpp_put_bits(&bp, !hw_ctx->ls_info.last_frame_type, 1); in prepare_uncompress_header()
708 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_gen_regs() local
718 if (!hw_ctx->g_buf[i].use_flag) { in hal_vp9d_vdpu383_gen_regs()
720 hw_ctx->global_base = hw_ctx->g_buf[i].global_base; in hal_vp9d_vdpu383_gen_regs()
721 hw_ctx->probe_base = hw_ctx->g_buf[i].probe_base; in hal_vp9d_vdpu383_gen_regs()
722 hw_ctx->count_base = hw_ctx->g_buf[i].count_base; in hal_vp9d_vdpu383_gen_regs()
723 hw_ctx->hw_regs = hw_ctx->g_buf[i].hw_regs; in hal_vp9d_vdpu383_gen_regs()
724 hw_ctx->g_buf[i].use_flag = 1; in hal_vp9d_vdpu383_gen_regs()
733 vp9_hw_regs = (Vdpu383Vp9dRegSet*)hw_ctx->hw_regs; in hal_vp9d_vdpu383_gen_regs()
749 …prepare_uncompress_header(p_hal, pic_param, (RK_U64 *)hw_ctx->header_data, sizeof(hw_ctx->header_d… in hal_vp9d_vdpu383_gen_regs()
750 … memcpy(mpp_buffer_get_ptr(hw_ctx->global_base), hw_ctx->header_data, sizeof(hw_ctx->header_data)); in hal_vp9d_vdpu383_gen_regs()
751 mpp_buffer_sync_end(hw_ctx->global_base); in hal_vp9d_vdpu383_gen_regs()
753 vp9_hw_regs->common_addr.reg131_gbl_base = mpp_buffer_get_fd(hw_ctx->global_base); in hal_vp9d_vdpu383_gen_regs()
755 if (hw_ctx->cmv_bufs == NULL || hw_ctx->mv_size < mv_size) { in hal_vp9d_vdpu383_gen_regs()
758 if (hw_ctx->cmv_bufs) { in hal_vp9d_vdpu383_gen_regs()
759 hal_bufs_deinit(hw_ctx->cmv_bufs); in hal_vp9d_vdpu383_gen_regs()
760 hw_ctx->cmv_bufs = NULL; in hal_vp9d_vdpu383_gen_regs()
763 hal_bufs_init(&hw_ctx->cmv_bufs); in hal_vp9d_vdpu383_gen_regs()
764 if (hw_ctx->cmv_bufs == NULL) { in hal_vp9d_vdpu383_gen_regs()
768 hw_ctx->mv_size = mv_size; in hal_vp9d_vdpu383_gen_regs()
769 hw_ctx->mv_count = mpp_buf_slot_get_count(p_hal ->slots); in hal_vp9d_vdpu383_gen_regs()
770 hal_bufs_setup(hw_ctx->cmv_bufs, hw_ctx->mv_count, 1, &size); in hal_vp9d_vdpu383_gen_regs()
775 hw_ctx->origin_bufs == NULL) { in hal_vp9d_vdpu383_gen_regs()
776 vdpu383_setup_scale_origin_bufs(hw_ctx, mframe); in hal_vp9d_vdpu383_gen_regs()
785 hal_vp9d_prob_kf(mpp_buffer_get_ptr(hw_ctx->probe_base)); in hal_vp9d_vdpu383_gen_regs()
786 mpp_buffer_sync_end(hw_ctx->probe_base); in hal_vp9d_vdpu383_gen_regs()
788 hal_vp9d_prob_default(mpp_buffer_get_ptr(hw_ctx->prob_default_base), task->dec.syntax.data); in hal_vp9d_vdpu383_gen_regs()
789 mpp_buffer_sync_end(hw_ctx->prob_default_base); in hal_vp9d_vdpu383_gen_regs()
798 memset(hw_ctx->prob_ctx_valid, 0, sizeof(hw_ctx->prob_ctx_valid)); in hal_vp9d_vdpu383_gen_regs()
800 hw_ctx->prob_ctx_valid[frame_ctx_id] = 0; in hal_vp9d_vdpu383_gen_regs()
804 if (hw_ctx->prob_ctx_valid[frame_ctx_id]) { in hal_vp9d_vdpu383_gen_regs()
806 mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]); in hal_vp9d_vdpu383_gen_regs()
808 { cur_last_prob_base = hw_ctx->prob_loop_base[frame_ctx_id]; } in hal_vp9d_vdpu383_gen_regs()
811 … vp9_hw_regs->vp9d_addrs.reg184_lastprob_base = mpp_buffer_get_fd(hw_ctx->prob_default_base); in hal_vp9d_vdpu383_gen_regs()
812 hw_ctx->prob_ctx_valid[frame_ctx_id] |= pic_param->refresh_frame_context; in hal_vp9d_vdpu383_gen_regs()
814 { cur_last_prob_base = hw_ctx->prob_default_base; } in hal_vp9d_vdpu383_gen_regs()
818 mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]); in hal_vp9d_vdpu383_gen_regs()
820 vp9_hw_regs->vp9d_addrs.reg183_kfprob_base = mpp_buffer_get_fd(hw_ctx->probe_base); in hal_vp9d_vdpu383_gen_regs()
833 dump_data_to_file(dump_cur_fname_path, (void *)mpp_buffer_get_ptr(hw_ctx->probe_base), in hal_vp9d_vdpu383_gen_regs()
891 !pic_param->error_resilient_mode && hw_ctx->ls_info.last_show_frame) { in hal_vp9d_vdpu383_gen_regs()
892 hw_ctx->pre_mv_base_addr = hw_ctx->mv_base_addr; in hal_vp9d_vdpu383_gen_regs()
898 origin_buf = hal_bufs_get_buf(hw_ctx->origin_bufs, task->dec.output); in hal_vp9d_vdpu383_gen_regs()
914 if (hw_ctx->last_segid_flag) { in hal_vp9d_vdpu383_gen_regs()
915 vp9_hw_regs->vp9d_addrs.reg181_segidlast_base = mpp_buffer_get_fd(hw_ctx->segid_last_base); in hal_vp9d_vdpu383_gen_regs()
916 vp9_hw_regs->vp9d_addrs.reg182_segidcur_base = mpp_buffer_get_fd(hw_ctx->segid_cur_base); in hal_vp9d_vdpu383_gen_regs()
918 vp9_hw_regs->vp9d_addrs.reg181_segidlast_base = mpp_buffer_get_fd(hw_ctx->segid_cur_base); in hal_vp9d_vdpu383_gen_regs()
919 vp9_hw_regs->vp9d_addrs.reg182_segidcur_base = mpp_buffer_get_fd(hw_ctx->segid_last_base); in hal_vp9d_vdpu383_gen_regs()
922 cur_last_segid_flag = hw_ctx->last_segid_flag; in hal_vp9d_vdpu383_gen_regs()
934 …(pic_param->width != hw_ctx->ls_info.last_width || pic_param->height != hw_ctx->ls_info.last_heigh… in hal_vp9d_vdpu383_gen_regs()
936 hw_ctx->last_segid_flag = !hw_ctx->last_segid_flag; in hal_vp9d_vdpu383_gen_regs()
939 mv_buf = hal_bufs_get_buf(hw_ctx->cmv_bufs, task->dec.output); in hal_vp9d_vdpu383_gen_regs()
943 hw_ctx->mv_base_addr = vp9_hw_regs->vp9d_addrs.reg216_colmv_cur_base; in hal_vp9d_vdpu383_gen_regs()
944 if (hw_ctx->pre_mv_base_addr < 0) in hal_vp9d_vdpu383_gen_regs()
945 hw_ctx->pre_mv_base_addr = hw_ctx->mv_base_addr; in hal_vp9d_vdpu383_gen_regs()
948 vp9_hw_regs->vp9d_addrs.reg217_232_colmv_ref_base[0] = hw_ctx->pre_mv_base_addr; in hal_vp9d_vdpu383_gen_regs()
976 … if (hw_ctx->origin_bufs && mpp_frame_get_thumbnail_en(mframe) == MPP_FRAME_THUMBNAIL_ONLY) { in hal_vp9d_vdpu383_gen_regs()
977 origin_buf = hal_bufs_get_buf(hw_ctx->origin_bufs, ref_frame_idx); in hal_vp9d_vdpu383_gen_regs()
1012 mv_buf = hal_bufs_get_buf(hw_ctx->cmv_bufs, ref_frame_idx); in hal_vp9d_vdpu383_gen_regs()
1044 hw_ctx->ls_info.abs_delta_last = pic_param->stVP9Segments.abs_delta; in hal_vp9d_vdpu383_gen_regs()
1046 hw_ctx->ls_info.last_ref_deltas[i] = pic_param->ref_deltas[i]; in hal_vp9d_vdpu383_gen_regs()
1050 hw_ctx->ls_info.last_mode_deltas[i] = pic_param->mode_deltas[i]; in hal_vp9d_vdpu383_gen_regs()
1054 hw_ctx->ls_info.feature_data[i][0] = pic_param->stVP9Segments.feature_data[i][0]; in hal_vp9d_vdpu383_gen_regs()
1055 hw_ctx->ls_info.feature_data[i][1] = pic_param->stVP9Segments.feature_data[i][1]; in hal_vp9d_vdpu383_gen_regs()
1056 hw_ctx->ls_info.feature_data[i][2] = pic_param->stVP9Segments.feature_data[i][2]; in hal_vp9d_vdpu383_gen_regs()
1057 hw_ctx->ls_info.feature_data[i][3] = pic_param->stVP9Segments.feature_data[i][3]; in hal_vp9d_vdpu383_gen_regs()
1058 hw_ctx->ls_info.feature_mask[i] = pic_param->stVP9Segments.feature_mask[i]; in hal_vp9d_vdpu383_gen_regs()
1060 if (!hw_ctx->ls_info.segmentation_enable_flag_last) in hal_vp9d_vdpu383_gen_regs()
1061 hw_ctx->ls_info.segmentation_enable_flag_last = pic_param->stVP9Segments.enabled; in hal_vp9d_vdpu383_gen_regs()
1063 hw_ctx->ls_info.last_show_frame = pic_param->show_frame; in hal_vp9d_vdpu383_gen_regs()
1064 hw_ctx->ls_info.last_width = pic_param->width; in hal_vp9d_vdpu383_gen_regs()
1065 hw_ctx->ls_info.last_height = pic_param->height; in hal_vp9d_vdpu383_gen_regs()
1066 hw_ctx->ls_info.last_frame_type = pic_param->frame_type; in hal_vp9d_vdpu383_gen_regs()
1069 hw_ctx->ls_info.last_intra_only = 1; in hal_vp9d_vdpu383_gen_regs()
1071 hw_ctx->ls_info.last_intra_only = (!pic_param->frame_type || pic_param->intra_only); in hal_vp9d_vdpu383_gen_regs()
1075 hw_ctx->ls_info.last_intra_only); in hal_vp9d_vdpu383_gen_regs()
1081 rcb_buf = p_hal->fast_mode ? hw_ctx->g_buf[task->dec.reg_index].rcb_buf : hw_ctx->rcb_buf; in hal_vp9d_vdpu383_gen_regs()
1082 vdpu383_setup_rcb(&vp9_hw_regs->common_addr, p_hal->dev, rcb_buf, hw_ctx->rcb_info); in hal_vp9d_vdpu383_gen_regs()
1104 origin_buf = hal_bufs_get_buf(hw_ctx->origin_bufs, task->dec.output); in hal_vp9d_vdpu383_gen_regs()
1132 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_start() local
1133 Vdpu383Vp9dRegSet *hw_regs = (Vdpu383Vp9dRegSet *)hw_ctx->hw_regs; in hal_vp9d_vdpu383_start()
1139 hw_regs = (Vdpu383Vp9dRegSet *)hw_ctx->g_buf[index].hw_regs; in hal_vp9d_vdpu383_start()
1194 vdpu383_set_rcbinfo(dev, hw_ctx->rcb_info); in hal_vp9d_vdpu383_start()
1210 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_wait() local
1211 Vdpu383Vp9dRegSet *hw_regs = (Vdpu383Vp9dRegSet *)hw_ctx->hw_regs; in hal_vp9d_vdpu383_wait()
1214 hw_regs = (Vdpu383Vp9dRegSet *)hw_ctx->g_buf[task->dec.reg_index].hw_regs; in hal_vp9d_vdpu383_wait()
1229 (void *)mpp_buffer_get_ptr(hw_ctx->prob_loop_base[frame_ctx_id]), in hal_vp9d_vdpu383_wait()
1238 (void *)mpp_buffer_get_ptr(hw_ctx->segid_cur_base), in hal_vp9d_vdpu383_wait()
1242 (void *)mpp_buffer_get_ptr(hw_ctx->segid_last_base), in hal_vp9d_vdpu383_wait()
1251 (void *)mpp_buffer_get_ptr(hw_ctx->segid_cur_base), in hal_vp9d_vdpu383_wait()
1255 (void *)mpp_buffer_get_ptr(hw_ctx->segid_last_base), in hal_vp9d_vdpu383_wait()
1286 hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data); in hal_vp9d_vdpu383_wait()
1291 hw_ctx->g_buf[task->dec.reg_index].use_flag = 0; in hal_vp9d_vdpu383_wait()
1301 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_reset() local
1305 memset(&hw_ctx->ls_info, 0, sizeof(hw_ctx->ls_info)); in hal_vp9d_vdpu383_reset()
1306 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu383_reset()
1307 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu383_reset()
1308 hw_ctx->last_segid_flag = 1; in hal_vp9d_vdpu383_reset()
1318 Vdpu383Vp9dCtx *hw_ctx = (Vdpu383Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu383_flush() local
1322 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu383_flush()
1323 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu383_flush()