Lines Matching refs:hw_ctx
88 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_alloc_res() local
89 hw_ctx->offset_count = VDPU382_OFFSET_COUNT; in hal_vp9d_alloc_res()
90 hw_ctx->offset_segid_cur = 0; in hal_vp9d_alloc_res()
91 hw_ctx->offset_segid_last = MAX_SEGMAP_SIZE_ALIGN_TO_4K; in hal_vp9d_alloc_res()
94 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_loop_base[i], PROB_SIZE); in hal_vp9d_alloc_res()
100 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_default_base, PROB_SIZE); in hal_vp9d_alloc_res()
108 hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu382Vp9dRegSet)); in hal_vp9d_alloc_res()
109 … ret = mpp_buffer_get(p_hal->group, &hw_ctx->g_buf[i].probe_base, VDPU382_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
116 hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(Vdpu382Vp9dRegSet)); in hal_vp9d_alloc_res()
117 ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, VDPU382_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
124 ret = mpp_buffer_get(p_hal->group, &hw_ctx->seg_base, MAX_SEGMAP_SIZE_ALIGN_TO_4K * 2); in hal_vp9d_alloc_res()
137 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_release_res() local
139 if (hw_ctx->prob_default_base) { in hal_vp9d_release_res()
140 ret = mpp_buffer_put(hw_ctx->prob_default_base); in hal_vp9d_release_res()
147 if (hw_ctx->prob_loop_base[i]) { in hal_vp9d_release_res()
148 ret = mpp_buffer_put(hw_ctx->prob_loop_base[i]); in hal_vp9d_release_res()
157 if (hw_ctx->g_buf[i].probe_base) { in hal_vp9d_release_res()
158 ret = mpp_buffer_put(hw_ctx->g_buf[i].probe_base); in hal_vp9d_release_res()
164 if (hw_ctx->g_buf[i].hw_regs) { in hal_vp9d_release_res()
165 mpp_free(hw_ctx->g_buf[i].hw_regs); in hal_vp9d_release_res()
166 hw_ctx->g_buf[i].hw_regs = NULL; in hal_vp9d_release_res()
168 if (hw_ctx->g_buf[i].rcb_buf) { in hal_vp9d_release_res()
169 ret = mpp_buffer_put(hw_ctx->g_buf[i].rcb_buf); in hal_vp9d_release_res()
177 if (hw_ctx->probe_base) { in hal_vp9d_release_res()
178 ret = mpp_buffer_put(hw_ctx->probe_base); in hal_vp9d_release_res()
185 if (hw_ctx->hw_regs) { in hal_vp9d_release_res()
186 mpp_free(hw_ctx->hw_regs); in hal_vp9d_release_res()
187 hw_ctx->hw_regs = NULL; in hal_vp9d_release_res()
189 if (hw_ctx->rcb_buf) { in hal_vp9d_release_res()
190 ret = mpp_buffer_put(hw_ctx->rcb_buf); in hal_vp9d_release_res()
198 if (hw_ctx->cmv_bufs) { in hal_vp9d_release_res()
199 ret = hal_bufs_deinit(hw_ctx->cmv_bufs); in hal_vp9d_release_res()
206 if (hw_ctx->seg_base) { in hal_vp9d_release_res()
207 ret = mpp_buffer_put(hw_ctx->seg_base); in hal_vp9d_release_res()
231 MPP_FREE(p_hal->hw_ctx); in hal_vp9d_vdpu382_deinit()
239 MEM_CHECK(ret, p_hal->hw_ctx = mpp_calloc_size(void, sizeof(Vdpu382Vp9dCtx))); in hal_vp9d_vdpu382_init()
240 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_init() local
242 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu382_init()
243 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu382_init()
261 hw_ctx->last_segid_flag = 1; in hal_vp9d_vdpu382_init()
346 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_rcb_info_update() local
353 if (hw_ctx->num_row_tiles != num_tiles || in hal_vp9d_rcb_info_update()
354 hw_ctx->bit_depth != bit_depth || in hal_vp9d_rcb_info_update()
355 hw_ctx->width != width || in hal_vp9d_rcb_info_update()
356 hw_ctx->height != height) { in hal_vp9d_rcb_info_update()
358 hw_ctx->rcb_buf_size = vdpu382_get_rcb_buf_size(hw_ctx->rcb_info, width, height); in hal_vp9d_rcb_info_update()
359 vp9d_refine_rcb_size(hw_ctx->rcb_info, hw_regs, width, height, pic_param); in hal_vp9d_rcb_info_update()
364 for (i = 0; i < MPP_ARRAY_ELEMS(hw_ctx->g_buf); i++) { in hal_vp9d_rcb_info_update()
365 MppBuffer rcb_buf = hw_ctx->g_buf[i].rcb_buf; in hal_vp9d_rcb_info_update()
369 hw_ctx->g_buf[i].rcb_buf = NULL; in hal_vp9d_rcb_info_update()
371 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
372 hw_ctx->g_buf[i].rcb_buf = rcb_buf; in hal_vp9d_rcb_info_update()
375 MppBuffer rcb_buf = hw_ctx->rcb_buf; in hal_vp9d_rcb_info_update()
381 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
382 hw_ctx->rcb_buf = rcb_buf; in hal_vp9d_rcb_info_update()
385 hw_ctx->num_row_tiles = num_tiles; in hal_vp9d_rcb_info_update()
386 hw_ctx->bit_depth = bit_depth; in hal_vp9d_rcb_info_update()
387 hw_ctx->width = width; in hal_vp9d_rcb_info_update()
388 hw_ctx->height = height; in hal_vp9d_rcb_info_update()
396 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_setup_colmv_buf() local
404 if (hw_ctx->cmv_bufs == NULL || hw_ctx->mv_size < mv_size) { in hal_vp9d_vdpu382_setup_colmv_buf()
407 if (hw_ctx->cmv_bufs) { in hal_vp9d_vdpu382_setup_colmv_buf()
408 hal_bufs_deinit(hw_ctx->cmv_bufs); in hal_vp9d_vdpu382_setup_colmv_buf()
409 hw_ctx->cmv_bufs = NULL; in hal_vp9d_vdpu382_setup_colmv_buf()
412 hal_bufs_init(&hw_ctx->cmv_bufs); in hal_vp9d_vdpu382_setup_colmv_buf()
413 if (hw_ctx->cmv_bufs == NULL) { in hal_vp9d_vdpu382_setup_colmv_buf()
417 hw_ctx->mv_size = mv_size; in hal_vp9d_vdpu382_setup_colmv_buf()
418 hw_ctx->mv_count = mpp_buf_slot_get_count(p_hal ->slots); in hal_vp9d_vdpu382_setup_colmv_buf()
419 hal_bufs_setup(hw_ctx->cmv_bufs, hw_ctx->mv_count, 1, &size); in hal_vp9d_vdpu382_setup_colmv_buf()
447 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_gen_regs() local
453 if (!hw_ctx->g_buf[i].use_flag) { in hal_vp9d_vdpu382_gen_regs()
455 hw_ctx->probe_base = hw_ctx->g_buf[i].probe_base; in hal_vp9d_vdpu382_gen_regs()
457 hw_ctx->hw_regs = hw_ctx->g_buf[i].hw_regs; in hal_vp9d_vdpu382_gen_regs()
458 hw_ctx->g_buf[i].use_flag = 1; in hal_vp9d_vdpu382_gen_regs()
471 Vdpu382Vp9dRegSet *vp9_hw_regs = (Vdpu382Vp9dRegSet*)hw_ctx->hw_regs; in hal_vp9d_vdpu382_gen_regs()
474 memset(hw_ctx->hw_regs, 0, sizeof(Vdpu382Vp9dRegSet)); in hal_vp9d_vdpu382_gen_regs()
476 hal_vp9d_prob_flag_delta(mpp_buffer_get_ptr(hw_ctx->probe_base), task->dec.syntax.data); in hal_vp9d_vdpu382_gen_regs()
477 mpp_buffer_sync_end(hw_ctx->probe_base); in hal_vp9d_vdpu382_gen_regs()
479 hal_vp9d_prob_default(mpp_buffer_get_ptr(hw_ctx->prob_default_base), task->dec.syntax.data); in hal_vp9d_vdpu382_gen_regs()
480 mpp_buffer_sync_end(hw_ctx->prob_default_base); in hal_vp9d_vdpu382_gen_regs()
498 vp9_hw_regs->vp9d_param.reg103.last_key_frame_flag = hw_ctx->ls_info.last_intra_only; in hal_vp9d_vdpu382_gen_regs()
533 hw_ctx->col_ref_poc ? hw_ctx->col_ref_poc : vp9_hw_regs->vp9d_param.reg65.cur_poc; in hal_vp9d_vdpu382_gen_regs()
535 hw_ctx->col_ref_poc = vp9_hw_regs->vp9d_param.reg65.cur_poc; in hal_vp9d_vdpu382_gen_regs()
537 vp9_hw_regs->vp9d_param.reg100.segid_ref_poc = hw_ctx->segid_ref_poc; in hal_vp9d_vdpu382_gen_regs()
539 vp9_hw_regs->vp9d_addr.reg169_segidcur_base = mpp_buffer_get_fd(hw_ctx->seg_base); in hal_vp9d_vdpu382_gen_regs()
540 vp9_hw_regs->vp9d_addr.reg168_segidlast_base = mpp_buffer_get_fd(hw_ctx->seg_base); in hal_vp9d_vdpu382_gen_regs()
541 if (hw_ctx->last_segid_flag) { in hal_vp9d_vdpu382_gen_regs()
542 mpp_dev_set_reg_offset(p_hal->dev, 168, hw_ctx->offset_segid_last); in hal_vp9d_vdpu382_gen_regs()
543 mpp_dev_set_reg_offset(p_hal->dev, 169, hw_ctx->offset_segid_cur); in hal_vp9d_vdpu382_gen_regs()
545 mpp_dev_set_reg_offset(p_hal->dev, 168, hw_ctx->offset_segid_cur); in hal_vp9d_vdpu382_gen_regs()
546 mpp_dev_set_reg_offset(p_hal->dev, 169, hw_ctx->offset_segid_last); in hal_vp9d_vdpu382_gen_regs()
550 (hw_ctx->ls_info.last_width != pic_param->width) || in hal_vp9d_vdpu382_gen_regs()
551 (hw_ctx->ls_info.last_height != pic_param->height) || in hal_vp9d_vdpu382_gen_regs()
553 hw_ctx->segid_ref_poc = vp9_hw_regs->vp9d_param.reg65.cur_poc; in hal_vp9d_vdpu382_gen_regs()
554 hw_ctx->last_segid_flag = !hw_ctx->last_segid_flag; in hal_vp9d_vdpu382_gen_regs()
568 memset(hw_ctx->prob_ctx_valid, 0, sizeof(hw_ctx->prob_ctx_valid)); in hal_vp9d_vdpu382_gen_regs()
570 hw_ctx->prob_ctx_valid[frame_ctx_id] = 0; in hal_vp9d_vdpu382_gen_regs()
582 if (hw_ctx->prob_ctx_valid[frame_ctx_id]) { in hal_vp9d_vdpu382_gen_regs()
583 … tmp = (RK_U32 *)mpp_buffer_get_ptr(hw_ctx->prob_loop_base[pic_param->frame_context_idx]); in hal_vp9d_vdpu382_gen_regs()
585 tmp = (RK_U32 *)mpp_buffer_get_ptr(hw_ctx->prob_default_base); in hal_vp9d_vdpu382_gen_regs()
596 if (hw_ctx->prob_ctx_valid[frame_ctx_id]) { in hal_vp9d_vdpu382_gen_regs()
598 mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]); in hal_vp9d_vdpu382_gen_regs()
600 vp9_hw_regs->vp9d_param.reg99.prob_ref_poc = hw_ctx->prob_ref_poc[frame_ctx_id]; in hal_vp9d_vdpu382_gen_regs()
602 … vp9_hw_regs->vp9d_addr.reg162_last_prob_base = mpp_buffer_get_fd(hw_ctx->prob_default_base); in hal_vp9d_vdpu382_gen_regs()
603 hw_ctx->prob_ctx_valid[frame_ctx_id] |= pic_param->refresh_frame_context; in hal_vp9d_vdpu382_gen_regs()
607 hw_ctx->prob_ref_poc[frame_ctx_id] = vp9_hw_regs->vp9d_param.reg65.cur_poc; in hal_vp9d_vdpu382_gen_regs()
610 mpp_buffer_get_fd(hw_ctx->prob_loop_base[frame_ctx_id]); in hal_vp9d_vdpu382_gen_regs()
614 vp9_hw_regs->vp9d_addr.reg160_delta_prob_base = mpp_buffer_get_fd(hw_ctx->probe_base); in hal_vp9d_vdpu382_gen_regs()
616 hal_vp9d_output_probe(mpp_buffer_get_ptr(hw_ctx->probe_base), task->dec.syntax.data); in hal_vp9d_vdpu382_gen_regs()
617 mpp_buffer_sync_end(hw_ctx->probe_base); in hal_vp9d_vdpu382_gen_regs()
661 !pic_param->error_resilient_mode && hw_ctx->ls_info.last_show_frame) { in hal_vp9d_vdpu382_gen_regs()
662 hw_ctx->pre_mv_base_addr = hw_ctx->mv_base_addr; in hal_vp9d_vdpu382_gen_regs()
670 vp9_hw_regs->vp9d_addr.reg167_count_prob_base = mpp_buffer_get_fd(hw_ctx->probe_base); in hal_vp9d_vdpu382_gen_regs()
671 mpp_dev_set_reg_offset(p_hal->dev, 167, hw_ctx->offset_count); in hal_vp9d_vdpu382_gen_regs()
674 mv_buf = hal_bufs_get_buf(hw_ctx->cmv_bufs, task->dec.output); in hal_vp9d_vdpu382_gen_regs()
676 hw_ctx->mv_base_addr = vp9_hw_regs->common_addr.reg131_colmv_cur_base; in hal_vp9d_vdpu382_gen_regs()
677 if (hw_ctx->pre_mv_base_addr < 0) { in hal_vp9d_vdpu382_gen_regs()
678 hw_ctx->pre_mv_base_addr = hw_ctx->mv_base_addr; in hal_vp9d_vdpu382_gen_regs()
680 vp9_hw_regs->vp9d_addr.reg170_ref_colmv_base = hw_ctx->pre_mv_base_addr; in hal_vp9d_vdpu382_gen_regs()
752 … mv_buf = hal_bufs_get_buf(hw_ctx->cmv_bufs, pic_param->ref_frame_map[ref_idx].Index7Bits); in hal_vp9d_vdpu382_gen_regs()
761 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta_en = (hw_ctx->ls_info.feature_mas… in hal_vp9d_vdpu382_gen_regs()
762 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_qp_delta = hw_ctx->ls_info.feature_data… in hal_vp9d_vdpu382_gen_regs()
763 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfitler_value_en = (hw_ctx->ls_info.feature_mas… in hal_vp9d_vdpu382_gen_regs()
764 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_loopfilter_value = hw_ctx->ls_info.feature_data… in hal_vp9d_vdpu382_gen_regs()
765 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo_en = (hw_ctx->ls_info.feature_mas… in hal_vp9d_vdpu382_gen_regs()
766 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_referinfo = hw_ctx->ls_info.feature_data… in hal_vp9d_vdpu382_gen_regs()
767 …vp9_hw_regs->vp9d_param.reg67_74[i].segid_frame_skip_en = (hw_ctx->ls_info.feature_mas… in hal_vp9d_vdpu382_gen_regs()
770 vp9_hw_regs->vp9d_param.reg67_74[0].segid_abs_delta = hw_ctx->ls_info.abs_delta_last; in hal_vp9d_vdpu382_gen_regs()
777 …vp9_hw_regs->vp9d_param.reg94.ref_deltas_lastframe |= (hw_ctx->ls_info.last_ref_deltas[i] & 0x7f… in hal_vp9d_vdpu382_gen_regs()
780 …vp9_hw_regs->vp9d_param.reg75.mode_deltas_lastframe |= (hw_ctx->ls_info.last_mode_deltas[i] & 0x7… in hal_vp9d_vdpu382_gen_regs()
782 hw_ctx->ls_info.segmentation_enable_flag_last = 0; in hal_vp9d_vdpu382_gen_regs()
783 hw_ctx->ls_info.last_intra_only = 1; in hal_vp9d_vdpu382_gen_regs()
786 …vp9_hw_regs->vp9d_param.reg75.segmentation_enable_lstframe = hw_ctx->ls_info.segmentation_enab… in hal_vp9d_vdpu382_gen_regs()
787 … vp9_hw_regs->vp9d_param.reg75.last_show_frame = hw_ctx->ls_info.last_show_frame; in hal_vp9d_vdpu382_gen_regs()
788 … vp9_hw_regs->vp9d_param.reg75.last_intra_only = hw_ctx->ls_info.last_intra_only; in hal_vp9d_vdpu382_gen_regs()
789 …hheight_eqcur = (pic_param->width == hw_ctx->ls_info.last_width) && (pic_param->height =… in hal_vp9d_vdpu382_gen_regs()
824 hw_ctx->ls_info.abs_delta_last = pic_param->stVP9Segments.abs_delta; in hal_vp9d_vdpu382_gen_regs()
826 hw_ctx->ls_info.last_ref_deltas[i] = pic_param->ref_deltas[i]; in hal_vp9d_vdpu382_gen_regs()
830 hw_ctx->ls_info.last_mode_deltas[i] = pic_param->mode_deltas[i]; in hal_vp9d_vdpu382_gen_regs()
834 hw_ctx->ls_info.feature_data[i][0] = pic_param->stVP9Segments.feature_data[i][0]; in hal_vp9d_vdpu382_gen_regs()
835 hw_ctx->ls_info.feature_data[i][1] = pic_param->stVP9Segments.feature_data[i][1]; in hal_vp9d_vdpu382_gen_regs()
836 hw_ctx->ls_info.feature_data[i][2] = pic_param->stVP9Segments.feature_data[i][2]; in hal_vp9d_vdpu382_gen_regs()
837 hw_ctx->ls_info.feature_data[i][3] = pic_param->stVP9Segments.feature_data[i][3]; in hal_vp9d_vdpu382_gen_regs()
838 hw_ctx->ls_info.feature_mask[i] = pic_param->stVP9Segments.feature_mask[i]; in hal_vp9d_vdpu382_gen_regs()
840 if (!hw_ctx->ls_info.segmentation_enable_flag_last) in hal_vp9d_vdpu382_gen_regs()
841 hw_ctx->ls_info.segmentation_enable_flag_last = pic_param->stVP9Segments.enabled; in hal_vp9d_vdpu382_gen_regs()
843 hw_ctx->ls_info.last_show_frame = pic_param->show_frame; in hal_vp9d_vdpu382_gen_regs()
844 hw_ctx->ls_info.last_width = pic_param->width; in hal_vp9d_vdpu382_gen_regs()
845 hw_ctx->ls_info.last_height = pic_param->height; in hal_vp9d_vdpu382_gen_regs()
846 hw_ctx->ls_info.last_intra_only = (!pic_param->frame_type || pic_param->intra_only); in hal_vp9d_vdpu382_gen_regs()
850 hw_ctx->ls_info.last_intra_only); in hal_vp9d_vdpu382_gen_regs()
856 rcb_buf = p_hal->fast_mode ? hw_ctx->g_buf[task->dec.reg_index].rcb_buf : hw_ctx->rcb_buf; in hal_vp9d_vdpu382_gen_regs()
857 vdpu382_setup_rcb(&vp9_hw_regs->common_addr, p_hal->dev, rcb_buf, hw_ctx->rcb_info); in hal_vp9d_vdpu382_gen_regs()
890 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_start() local
891 Vdpu382Vp9dRegSet *hw_regs = (Vdpu382Vp9dRegSet *)hw_ctx->hw_regs; in hal_vp9d_vdpu382_start()
896 hw_regs = (Vdpu382Vp9dRegSet *)hw_ctx->g_buf[index].hw_regs; in hal_vp9d_vdpu382_start()
999 vdpu382_set_rcbinfo(dev, hw_ctx->rcb_info); in hal_vp9d_vdpu382_start()
1015 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_wait() local
1016 Vdpu382Vp9dRegSet *hw_regs = (Vdpu382Vp9dRegSet *)hw_ctx->hw_regs; in hal_vp9d_vdpu382_wait()
1019 hw_regs = (Vdpu382Vp9dRegSet *)hw_ctx->g_buf[task->dec.reg_index].hw_regs; in hal_vp9d_vdpu382_wait()
1046 mpp_buffer_sync_end(hw_ctx->count_base); in hal_vp9d_vdpu382_wait()
1047 hal_vp9d_update_counts(mpp_buffer_get_ptr(hw_ctx->count_base), task->dec.syntax.data); in hal_vp9d_vdpu382_wait()
1052 hw_ctx->g_buf[task->dec.reg_index].use_flag = 0; in hal_vp9d_vdpu382_wait()
1062 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_reset() local
1066 memset(&hw_ctx->ls_info, 0, sizeof(hw_ctx->ls_info)); in hal_vp9d_vdpu382_reset()
1067 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu382_reset()
1068 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu382_reset()
1069 hw_ctx->last_segid_flag = 1; in hal_vp9d_vdpu382_reset()
1070 memset(&hw_ctx->prob_ref_poc, 0, sizeof(hw_ctx->prob_ref_poc)); in hal_vp9d_vdpu382_reset()
1071 hw_ctx->col_ref_poc = 0; in hal_vp9d_vdpu382_reset()
1072 hw_ctx->segid_ref_poc = 0; in hal_vp9d_vdpu382_reset()
1082 Vdpu382Vp9dCtx *hw_ctx = (Vdpu382Vp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu382_flush() local
1086 hw_ctx->mv_base_addr = -1; in hal_vp9d_vdpu382_flush()
1087 hw_ctx->pre_mv_base_addr = -1; in hal_vp9d_vdpu382_flush()