Lines Matching refs:common
326 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()
334 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()
504 vp9_hw_regs->common.reg028.sw_poc_arb_flag = 1; in hal_vp9d_vdpu382_gen_regs()
599 vp9_hw_regs->common.reg028.swreg_vp9_rd_prob_idx = frame_ctx_id + 1; in hal_vp9d_vdpu382_gen_regs()
604 vp9_hw_regs->common.reg028.swreg_vp9_rd_prob_idx = 0; in hal_vp9d_vdpu382_gen_regs()
611 vp9_hw_regs->common.reg028.swreg_vp9_wr_prob_idx = frame_ctx_id + 1; in hal_vp9d_vdpu382_gen_regs()
619 …vp9_hw_regs->common.reg012.colmv_compress_en = p_hal->hw_info ? p_hal->hw_info->cap_colmv_compress… in hal_vp9d_vdpu382_gen_regs()
620 vp9_hw_regs->common.reg013.cur_pic_is_idr = !pic_param->frame_type; in hal_vp9d_vdpu382_gen_regs()
621 vp9_hw_regs->common.reg009.dec_mode = 2; //set as vp9 dec in hal_vp9d_vdpu382_gen_regs()
622 vp9_hw_regs->common.reg016_str_len = ((stream_len + 15) & (~15)) + 0x80; in hal_vp9d_vdpu382_gen_regs()
626 aglin_offset = vp9_hw_regs->common.reg016_str_len - stream_len; in hal_vp9d_vdpu382_gen_regs()
645 vp9_hw_regs->common.reg012.fbc_e = 1; in hal_vp9d_vdpu382_gen_regs()
646 vp9_hw_regs->common.reg018.y_hor_virstride = fbc_hdr_stride >> 4; in hal_vp9d_vdpu382_gen_regs()
647 vp9_hw_regs->common.reg019.uv_hor_virstride = fbc_hdr_stride >> 4; in hal_vp9d_vdpu382_gen_regs()
648 vp9_hw_regs->common.reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in hal_vp9d_vdpu382_gen_regs()
654 vp9_hw_regs->common.reg012.fbc_e = 0; in hal_vp9d_vdpu382_gen_regs()
655 vp9_hw_regs->common.reg018.y_hor_virstride = sw_y_hor_virstride; in hal_vp9d_vdpu382_gen_regs()
656 vp9_hw_regs->common.reg019.uv_hor_virstride = sw_uv_hor_virstride; in hal_vp9d_vdpu382_gen_regs()
657 vp9_hw_regs->common.reg020_y_virstride.y_virstride = sw_y_virstride; in hal_vp9d_vdpu382_gen_regs()
802 vp9_hw_regs->common.reg010.dec_e = 1; in hal_vp9d_vdpu382_gen_regs()
803 vp9_hw_regs->common.reg011.buf_empty_en = 1; in hal_vp9d_vdpu382_gen_regs()
804 vp9_hw_regs->common.reg011.dec_clkgate_e = 1; in hal_vp9d_vdpu382_gen_regs()
805 vp9_hw_regs->common.reg011.err_head_fill_e = 1; in hal_vp9d_vdpu382_gen_regs()
806 vp9_hw_regs->common.reg011.err_colmv_fill_e = 1; in hal_vp9d_vdpu382_gen_regs()
808 vp9_hw_regs->common.reg026.inter_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
809 vp9_hw_regs->common.reg026.filterd_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
810 vp9_hw_regs->common.reg026.strmd_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
811 vp9_hw_regs->common.reg026.mcp_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
812 vp9_hw_regs->common.reg026.busifd_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
813 vp9_hw_regs->common.reg026.dec_ctrl_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
814 vp9_hw_regs->common.reg026.intra_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
815 vp9_hw_regs->common.reg026.mc_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
816 vp9_hw_regs->common.reg026.transd_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
817 vp9_hw_regs->common.reg026.sram_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
818 vp9_hw_regs->common.reg026.cru_auto_gating_e = 1; in hal_vp9d_vdpu382_gen_regs()
819 vp9_hw_regs->common.reg026.reg_cfg_gating_en = 1; in hal_vp9d_vdpu382_gen_regs()
821 vp9_hw_regs->common.reg032_timeout_threshold = 0x3ffff; in hal_vp9d_vdpu382_gen_regs()
869 vdpu382_setup_down_scale(mframe, p_hal->dev, &vp9_hw_regs->common); in hal_vp9d_vdpu382_gen_regs()
873 vp9_hw_regs->common.reg012.scale_down_en = 0; in hal_vp9d_vdpu382_gen_regs()
876 vdpu382_setup_statistic(&vp9_hw_regs->common, &vp9_hw_regs->statistic); in hal_vp9d_vdpu382_gen_regs()
910 tmp = (RK_U32 *)&hw_regs->common; in hal_vp9d_vdpu382_start()
911 for (i = 0; i < sizeof(hw_regs->common) / 4; i++) { in hal_vp9d_vdpu382_start()
939 wr_cfg.reg = &hw_regs->common; in hal_vp9d_vdpu382_start()
940 wr_cfg.size = sizeof(hw_regs->common); in hal_vp9d_vdpu382_start()