Lines Matching refs:wr_cfg
902 MppDevRegWrCfg wr_cfg; in hal_vp9d_vdpu34x_start() local
905 wr_cfg.reg = &hw_regs->common; in hal_vp9d_vdpu34x_start()
906 wr_cfg.size = sizeof(hw_regs->common); in hal_vp9d_vdpu34x_start()
907 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_vp9d_vdpu34x_start()
909 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
915 wr_cfg.reg = &hw_regs->vp9d_param; in hal_vp9d_vdpu34x_start()
916 wr_cfg.size = sizeof(hw_regs->vp9d_param); in hal_vp9d_vdpu34x_start()
917 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_vp9d_vdpu34x_start()
919 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
925 wr_cfg.reg = &hw_regs->common_addr; in hal_vp9d_vdpu34x_start()
926 wr_cfg.size = sizeof(hw_regs->common_addr); in hal_vp9d_vdpu34x_start()
927 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_vp9d_vdpu34x_start()
929 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
935 wr_cfg.reg = &hw_regs->vp9d_addr; in hal_vp9d_vdpu34x_start()
936 wr_cfg.size = sizeof(hw_regs->vp9d_addr); in hal_vp9d_vdpu34x_start()
937 wr_cfg.offset = OFFSET_CODEC_ADDR_REGS; in hal_vp9d_vdpu34x_start()
939 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
945 wr_cfg.reg = &hw_regs->statistic; in hal_vp9d_vdpu34x_start()
946 wr_cfg.size = sizeof(hw_regs->statistic); in hal_vp9d_vdpu34x_start()
947 wr_cfg.offset = OFFSET_STATISTIC_REGS; in hal_vp9d_vdpu34x_start()
949 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()