Lines Matching refs:p_hal
87 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_alloc_res() local
88 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_alloc_res()
94 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_loop_base[i], PROB_SIZE); in hal_vp9d_alloc_res()
100 ret = mpp_buffer_get(p_hal->group, &hw_ctx->prob_default_base, PROB_SIZE); in hal_vp9d_alloc_res()
106 if (p_hal->fast_mode) { in hal_vp9d_alloc_res()
109 … ret = mpp_buffer_get(p_hal->group, &hw_ctx->g_buf[i].probe_base, VDPU34X_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
117 ret = mpp_buffer_get(p_hal->group, &hw_ctx->probe_base, VDPU34X_PROBE_BUFFER_SIZE); in hal_vp9d_alloc_res()
123 ret = mpp_buffer_get(p_hal->group, &hw_ctx->seg_base, MAX_SEGMAP_SIZE_ALIGN_TO_4K * 2); in hal_vp9d_alloc_res()
135 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_release_res() local
136 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_release_res()
154 if (p_hal->fast_mode) { in hal_vp9d_release_res()
219 HalVp9dCtx *p_hal = (HalVp9dCtx *)hal; in hal_vp9d_vdpu34x_deinit() local
221 hal_vp9d_release_res(p_hal); in hal_vp9d_vdpu34x_deinit()
223 if (p_hal->group) { in hal_vp9d_vdpu34x_deinit()
224 ret = mpp_buffer_group_put(p_hal->group); in hal_vp9d_vdpu34x_deinit()
230 MPP_FREE(p_hal->hw_ctx); in hal_vp9d_vdpu34x_deinit()
237 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_init() local
238 MEM_CHECK(ret, p_hal->hw_ctx = mpp_calloc_size(void, sizeof(Vdpu34xVp9dCtx))); in hal_vp9d_vdpu34x_init()
239 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_init()
243 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu34x_init()
244 mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, vp9_ver_align); in hal_vp9d_vdpu34x_init()
246 if (p_hal->group == NULL) { in hal_vp9d_vdpu34x_init()
247 ret = mpp_buffer_group_get_internal(&p_hal->group, MPP_BUFFER_TYPE_ION); in hal_vp9d_vdpu34x_init()
254 ret = hal_vp9d_alloc_res(p_hal); in hal_vp9d_vdpu34x_init()
333 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_rcb_info_update() local
334 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_rcb_info_update()
349 if (p_hal->fast_mode) { in hal_vp9d_rcb_info_update()
359 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
369 mpp_buffer_get(p_hal->group, &rcb_buf, hw_ctx->rcb_buf_size); in hal_vp9d_rcb_info_update()
382 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_setup_colmv_buf() local
383 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_setup_colmv_buf()
388 RK_U32 compress = p_hal->hw_info ? p_hal->hw_info->cap_colmv_compress : 1; in hal_vp9d_vdpu34x_setup_colmv_buf()
405 hw_ctx->mv_count = mpp_buf_slot_get_count(p_hal ->slots); in hal_vp9d_vdpu34x_setup_colmv_buf()
433 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_gen_regs() local
434 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_gen_regs()
438 if (p_hal->fast_mode) { in hal_vp9d_vdpu34x_gen_regs()
491 mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_gen_regs()
498 mpp_buf_slot_get_prop(p_hal ->slots, ref_frame_idx, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_gen_regs()
506 mpp_buf_slot_get_prop(p_hal ->slots, ref_frame_idx, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_gen_regs()
514 mpp_buf_slot_get_prop(p_hal ->slots, ref_frame_idx, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_gen_regs()
528 mpp_dev_set_reg_offset(p_hal->dev, 168, hw_ctx->offset_segid_last); in hal_vp9d_vdpu34x_gen_regs()
529 mpp_dev_set_reg_offset(p_hal->dev, 169, hw_ctx->offset_segid_cur); in hal_vp9d_vdpu34x_gen_regs()
531 mpp_dev_set_reg_offset(p_hal->dev, 168, hw_ctx->offset_segid_cur); in hal_vp9d_vdpu34x_gen_regs()
532 mpp_dev_set_reg_offset(p_hal->dev, 169, hw_ctx->offset_segid_last); in hal_vp9d_vdpu34x_gen_regs()
609 …vp9_hw_regs->common.reg012.colmv_compress_en = p_hal->hw_info ? p_hal->hw_info->cap_colmv_compress… in hal_vp9d_vdpu34x_gen_regs()
614 mpp_buf_slot_get_prop(p_hal ->packet_slots, task->dec.input, SLOT_BUFFER, &streambuf); in hal_vp9d_vdpu34x_gen_regs()
627 mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_gen_regs()
655 mpp_buf_slot_get_prop(p_hal ->slots, task->dec.output, SLOT_BUFFER, &framebuf); in hal_vp9d_vdpu34x_gen_regs()
661 mpp_dev_set_reg_offset(p_hal->dev, 167, hw_ctx->offset_count); in hal_vp9d_vdpu34x_gen_regs()
683 mpp_buf_slot_get_prop(p_hal ->slots, ref_frame_idx, SLOT_FRAME_PTR, &frame); in hal_vp9d_vdpu34x_gen_regs()
703 …mpp_buf_slot_get_prop(p_hal ->slots, pic_param->ref_frame_map[ref_idx].Index7Bits, SLOT_BUFFER, &f… in hal_vp9d_vdpu34x_gen_regs()
839 rcb_buf = p_hal->fast_mode ? hw_ctx->g_buf[task->dec.reg_index].rcb_buf : hw_ctx->rcb_buf; in hal_vp9d_vdpu34x_gen_regs()
840 vdpu34x_setup_rcb(&vp9_hw_regs->common_addr, p_hal->dev, rcb_buf, hw_ctx->rcb_info); in hal_vp9d_vdpu34x_gen_regs()
855 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_start() local
856 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_start()
858 MppDev dev = p_hal->dev; in hal_vp9d_vdpu34x_start()
860 if (p_hal->fast_mode) { in hal_vp9d_vdpu34x_start()
982 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_wait() local
983 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_wait()
986 if (p_hal->fast_mode) in hal_vp9d_vdpu34x_wait()
991 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL); in hal_vp9d_vdpu34x_wait()
1007 mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe); in hal_vp9d_vdpu34x_wait()
1011 if (p_hal->dec_cb && task->dec.flags.wait_done) { in hal_vp9d_vdpu34x_wait()
1016 mpp_callback(p_hal->dec_cb, &pic_param->counts); in hal_vp9d_vdpu34x_wait()
1019 if (p_hal->fast_mode) { in hal_vp9d_vdpu34x_wait()
1029 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_reset() local
1030 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_reset()
1049 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_flush() local
1050 Vdpu34xVp9dCtx *hw_ctx = (Vdpu34xVp9dCtx*)p_hal->hw_ctx; in hal_vp9d_vdpu34x_flush()
1064 HalVp9dCtx *p_hal = (HalVp9dCtx*)hal; in hal_vp9d_vdpu34x_control() local
1071 vdpu34x_afbc_align_calc(p_hal->slots, (MppFrame)param, 0); in hal_vp9d_vdpu34x_control()
1073 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu34x_control()