54     void*           hw_regs;  member
108             hw_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet));  in hal_vp9d_alloc_res()
116         hw_ctx->hw_regs = mpp_calloc_size(void, sizeof(Vdpu34xVp9dRegSet));  in hal_vp9d_alloc_res()
163             if (hw_ctx->g_buf[i].hw_regs) {  in hal_vp9d_release_res()
164                 mpp_free(hw_ctx->g_buf[i].hw_regs);  in hal_vp9d_release_res()
165                 hw_ctx->g_buf[i].hw_regs = NULL;  in hal_vp9d_release_res()
184         if (hw_ctx->hw_regs) {  in hal_vp9d_release_res()
185             mpp_free(hw_ctx->hw_regs);  in hal_vp9d_release_res()
186             hw_ctx->hw_regs = NULL;  in hal_vp9d_release_res()
331 static void hal_vp9d_rcb_info_update(void *hal,  Vdpu34xVp9dRegSet *hw_regs, void *data)  in hal_vp9d_rcb_info_update()  argument
347         vp9d_refine_rcb_size(hw_ctx->rcb_info, hw_regs, width, height, pic_param);  in hal_vp9d_rcb_info_update()
444                 hw_ctx->hw_regs = hw_ctx->g_buf[i].hw_regs;  in hal_vp9d_vdpu34x_gen_regs()
458     Vdpu34xVp9dRegSet *vp9_hw_regs = (Vdpu34xVp9dRegSet*)hw_ctx->hw_regs;  in hal_vp9d_vdpu34x_gen_regs()
461     memset(hw_ctx->hw_regs, 0, sizeof(Vdpu34xVp9dRegSet));  in hal_vp9d_vdpu34x_gen_regs()
857     Vdpu34xVp9dRegSet *hw_regs = (Vdpu34xVp9dRegSet *)hw_ctx->hw_regs;  in hal_vp9d_vdpu34x_start()  local
862         hw_regs = (Vdpu34xVp9dRegSet *)hw_ctx->g_buf[index].hw_regs;  in hal_vp9d_vdpu34x_start()
865     mpp_assert(hw_regs);  in hal_vp9d_vdpu34x_start()
876         tmp = (RK_U32 *)&hw_regs->common;  in hal_vp9d_vdpu34x_start()
877         for (i = 0; i < sizeof(hw_regs->common) / 4; i++) {  in hal_vp9d_vdpu34x_start()
881         tmp = (RK_U32 *)&hw_regs->vp9d_param;  in hal_vp9d_vdpu34x_start()
882         for (i = 0; i < sizeof(hw_regs->vp9d_param) / 4; i++) {  in hal_vp9d_vdpu34x_start()
886         tmp = (RK_U32 *)&hw_regs->common_addr;  in hal_vp9d_vdpu34x_start()
887         for (i = 0; i < sizeof(hw_regs->common_addr) / 4; i++) {  in hal_vp9d_vdpu34x_start()
891         tmp = (RK_U32 *)&hw_regs->vp9d_addr;  in hal_vp9d_vdpu34x_start()
892         for (i = 0; i < sizeof(hw_regs->vp9d_addr) / 4; i++) {  in hal_vp9d_vdpu34x_start()
905         wr_cfg.reg = &hw_regs->common;  in hal_vp9d_vdpu34x_start()
906         wr_cfg.size = sizeof(hw_regs->common);  in hal_vp9d_vdpu34x_start()
915         wr_cfg.reg = &hw_regs->vp9d_param;  in hal_vp9d_vdpu34x_start()
916         wr_cfg.size = sizeof(hw_regs->vp9d_param);  in hal_vp9d_vdpu34x_start()
925         wr_cfg.reg = &hw_regs->common_addr;  in hal_vp9d_vdpu34x_start()
926         wr_cfg.size = sizeof(hw_regs->common_addr);  in hal_vp9d_vdpu34x_start()
935         wr_cfg.reg = &hw_regs->vp9d_addr;  in hal_vp9d_vdpu34x_start()
936         wr_cfg.size = sizeof(hw_regs->vp9d_addr);  in hal_vp9d_vdpu34x_start()
945         wr_cfg.reg = &hw_regs->statistic;  in hal_vp9d_vdpu34x_start()
946         wr_cfg.size = sizeof(hw_regs->statistic);  in hal_vp9d_vdpu34x_start()
955         rd_cfg.reg = &hw_regs->irq_status;  in hal_vp9d_vdpu34x_start()
956         rd_cfg.size = sizeof(hw_regs->irq_status);  in hal_vp9d_vdpu34x_start()
984     Vdpu34xVp9dRegSet *hw_regs = (Vdpu34xVp9dRegSet *)hw_ctx->hw_regs;  in hal_vp9d_vdpu34x_wait()  local
987         hw_regs = (Vdpu34xVp9dRegSet *)hw_ctx->g_buf[task->dec.reg_index].hw_regs;  in hal_vp9d_vdpu34x_wait()
989     mpp_assert(hw_regs);  in hal_vp9d_vdpu34x_wait()
996         RK_U32 *p = (RK_U32 *)hw_regs;  in hal_vp9d_vdpu34x_wait()
1005         !hw_regs->irq_status.reg224.dec_rdy_sta) {  in hal_vp9d_vdpu34x_wait()