Lines Matching refs:width
46 RK_S32 vdpu384a_get_rcb_buf_size(Vdpu384aRcbInfo *info, RK_S32 width, RK_S32 height) in vdpu384a_get_rcb_buf_size() argument
50 offset += update_size_offset(info, 140, offset, width, RCB_STRMD_ROW); in vdpu384a_get_rcb_buf_size()
51 offset += update_size_offset(info, 142, offset, width, RCB_STRMD_TILE_ROW); in vdpu384a_get_rcb_buf_size()
52 offset += update_size_offset(info, 144, offset, width, RCB_INTER_ROW); in vdpu384a_get_rcb_buf_size()
53 offset += update_size_offset(info, 146, offset, width, RCB_INTER_TILE_ROW); in vdpu384a_get_rcb_buf_size()
54 offset += update_size_offset(info, 148, offset, width, RCB_INTRA_ROW); in vdpu384a_get_rcb_buf_size()
55 offset += update_size_offset(info, 150, offset, width, RCB_INTRA_TILE_ROW); in vdpu384a_get_rcb_buf_size()
56 offset += update_size_offset(info, 152, offset, width, RCB_FILTERD_ROW); in vdpu384a_get_rcb_buf_size()
57 offset += update_size_offset(info, 154, offset, width, RCB_FILTERD_PROTECT_ROW); in vdpu384a_get_rcb_buf_size()
58 offset += update_size_offset(info, 156, offset, width, RCB_FILTERD_TILE_ROW); in vdpu384a_get_rcb_buf_size()
65 RK_RET vdpu384a_check_rcb_buf_size(Vdpu384aRcbInfo *info, RK_S32 width, RK_S32 height) in vdpu384a_check_rcb_buf_size() argument
70 mpp_assert(info[i].size < (RK_S32)MPP_ALIGN(width * rcb_coeff[i], RCB_ALLINE_SIZE)); in vdpu384a_check_rcb_buf_size()