Lines Matching refs:info

32 static RK_S32 update_size_offset(Vdpu383RcbInfo *info, RK_U32 reg_idx,  in update_size_offset()  argument
38 info[idx].reg_idx = reg_idx; in update_size_offset()
39 info[idx].offset = offset; in update_size_offset()
40 info[idx].size = buf_size; in update_size_offset()
45 RK_S32 vdpu383_get_rcb_buf_size(Vdpu383RcbInfo *info, RK_S32 width, RK_S32 height) in vdpu383_get_rcb_buf_size() argument
49 offset += update_size_offset(info, 140, offset, width, RCB_STRMD_ROW); in vdpu383_get_rcb_buf_size()
50 offset += update_size_offset(info, 142, offset, width, RCB_STRMD_TILE_ROW); in vdpu383_get_rcb_buf_size()
51 offset += update_size_offset(info, 144, offset, width, RCB_INTER_ROW); in vdpu383_get_rcb_buf_size()
52 offset += update_size_offset(info, 146, offset, width, RCB_INTER_TILE_ROW); in vdpu383_get_rcb_buf_size()
53 offset += update_size_offset(info, 148, offset, width, RCB_INTRA_ROW); in vdpu383_get_rcb_buf_size()
54 offset += update_size_offset(info, 150, offset, width, RCB_INTRA_TILE_ROW); in vdpu383_get_rcb_buf_size()
55 offset += update_size_offset(info, 152, offset, width, RCB_FILTERD_ROW); in vdpu383_get_rcb_buf_size()
56 offset += update_size_offset(info, 154, offset, width, RCB_FILTERD_PROTECT_ROW); in vdpu383_get_rcb_buf_size()
57 offset += update_size_offset(info, 156, offset, width, RCB_FILTERD_TILE_ROW); in vdpu383_get_rcb_buf_size()
58 offset += update_size_offset(info, 158, offset, height, RCB_FILTERD_TILE_COL); in vdpu383_get_rcb_buf_size()
59 offset += update_size_offset(info, 160, offset, height, RCB_FILTERD_AV1_UP_TILE_COL); in vdpu383_get_rcb_buf_size()
65 MppBuffer buf, Vdpu383RcbInfo *info) in vdpu383_setup_rcb() argument
81 reg->reg141_rcb_strmd_row_len = info[RCB_STRMD_ROW].size ; in vdpu383_setup_rcb()
82 reg->reg143_rcb_strmd_tile_row_len = info[RCB_STRMD_TILE_ROW].size ; in vdpu383_setup_rcb()
83 reg->reg145_rcb_inter_row_len = info[RCB_INTER_ROW].size ; in vdpu383_setup_rcb()
84 reg->reg147_rcb_inter_tile_row_len = info[RCB_INTER_TILE_ROW].size ; in vdpu383_setup_rcb()
85 reg->reg149_rcb_intra_row_len = info[RCB_INTRA_ROW].size ; in vdpu383_setup_rcb()
86 reg->reg151_rcb_intra_tile_row_len = info[RCB_INTRA_TILE_ROW].size ; in vdpu383_setup_rcb()
87 reg->reg153_rcb_filterd_row_len = info[RCB_FILTERD_ROW].size ; in vdpu383_setup_rcb()
88 reg->reg155_rcb_filterd_protect_row_len = info[RCB_FILTERD_PROTECT_ROW].size; in vdpu383_setup_rcb()
89 reg->reg157_rcb_filterd_tile_row_len = info[RCB_FILTERD_TILE_ROW].size ; in vdpu383_setup_rcb()
90 reg->reg159_rcb_filterd_tile_col_len = info[RCB_FILTERD_TILE_COL].size ; in vdpu383_setup_rcb()
91 reg->reg161_rcb_filterd_av1_upscale_tile_col_len = info[RCB_FILTERD_AV1_UP_TILE_COL].size; in vdpu383_setup_rcb()
94 if (info[i].offset) in vdpu383_setup_rcb()
95 mpp_dev_set_reg_offset(dev, info[i].reg_idx, info[i].offset); in vdpu383_setup_rcb()
176 Vdpu383RcbInfo info[RCB_BUF_COUNT]; in vdpu383_set_rcbinfo() local
178 memcpy(info, rcb_info, sizeof(info)); in vdpu383_set_rcbinfo()
179 qsort(info, MPP_ARRAY_ELEMS(info), in vdpu383_set_rcbinfo()
180 sizeof(info[0]), vdpu383_compare_rcb_size); in vdpu383_set_rcbinfo()
182 for (i = 0; i < MPP_ARRAY_ELEMS(info); i++) { in vdpu383_set_rcbinfo()
183 rcb_cfg.reg_idx = info[i].reg_idx; in vdpu383_set_rcbinfo()
184 rcb_cfg.size = info[i].size; in vdpu383_set_rcbinfo()
192 Vdpu383RcbInfo *info = rcb_info; in vdpu383_set_rcbinfo() local
198 rcb_cfg.reg_idx = info[index].reg_idx; in vdpu383_set_rcbinfo()
199 rcb_cfg.size = info[index].size; in vdpu383_set_rcbinfo()