93     mpp_slots_set_prop(reg_ctx->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64);  in hal_h265d_vdpu384a_init()
94     mpp_slots_set_prop(reg_ctx->slots, SLOTS_VER_ALIGN, hevc_ver_align);  in hal_h265d_vdpu384a_init()
870         reg_ctx->mv_count = mpp_buf_slot_get_count(reg_ctx->slots);  in hal_h265d_vdpu384a_gen_regs()
881         mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.CurrPic.Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
943     mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.CurrPic.Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
1052             mpp_buf_slot_get_prop(reg_ctx->slots,  in hal_h265d_vdpu384a_gen_regs()
1055             mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.RefPicList[i].Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
1105             mpp_buf_slot_get_prop(reg_ctx->slots,  in hal_h265d_vdpu384a_gen_regs()
1109             mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.RefPicList[i].Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
1139         mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.CurrPic.Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
1141         mpp_buf_slot_get_prop(reg_ctx->slots, dxva_ctx->pp.CurrPic.Index7Bits,  in hal_h265d_vdpu384a_gen_regs()
1311             mpp_buf_slot_get_prop(reg_ctx->slots, task->dec.output,  in hal_h265d_vdpu384a_wait()
1324                     mpp_buf_slot_get_prop(reg_ctx->slots, task->dec.refer[i],  in hal_h265d_vdpu384a_wait()
1330                         mpp_buf_slot_get_prop(reg_ctx->slots, task->dec.output,  in hal_h265d_vdpu384a_wait()
1392             mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_422);  in hal_h265d_vdpu384a_control()
1394             mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_444);  in hal_h265d_vdpu384a_control()
1397             vdpu384a_afbc_align_calc(p_hal->slots, frame, 16);  in hal_h265d_vdpu384a_control()
1399             mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64);  in hal_h265d_vdpu384a_control()