910             hw_regs->h265d_paras.reg68_dpb_hor_virstride = fbc_hdr_stride / 64;  in hal_h265d_vdpu384a_gen_regs()
913 … hw_regs->h265d_paras.reg80_error_ref_hor_virstride = hw_regs->h265d_paras.reg68_dpb_hor_virstride;  in hal_h265d_vdpu384a_gen_regs()
920                 hw_regs->h265d_paras.reg77_pp_m_hor_stride = stride_y * 4 / 16;  in hal_h265d_vdpu384a_gen_regs()
922                 hw_regs->h265d_paras.reg77_pp_m_hor_stride = stride_y * 8 / 16;  in hal_h265d_vdpu384a_gen_regs()
924                 hw_regs->h265d_paras.reg77_pp_m_hor_stride = stride_y * 12 / 16;  in hal_h265d_vdpu384a_gen_regs()
926                 hw_regs->h265d_paras.reg77_pp_m_hor_stride = stride_y * 6 / 16;  in hal_h265d_vdpu384a_gen_regs()
928             hw_regs->h265d_paras.reg79_pp_m_y_virstride = (virstrid_y + virstrid_uv) / 16;  in hal_h265d_vdpu384a_gen_regs()
929 …   hw_regs->h265d_paras.reg80_error_ref_hor_virstride = hw_regs->h265d_paras.reg77_pp_m_hor_stride;  in hal_h265d_vdpu384a_gen_regs()
935             hw_regs->h265d_paras.reg77_pp_m_hor_stride = stride_y >> 4;  in hal_h265d_vdpu384a_gen_regs()
936             hw_regs->h265d_paras.reg78_pp_m_uv_hor_stride = stride_uv >> 4;  in hal_h265d_vdpu384a_gen_regs()
937             hw_regs->h265d_paras.reg79_pp_m_y_virstride = virstrid_y >> 4;  in hal_h265d_vdpu384a_gen_regs()
938 …   hw_regs->h265d_paras.reg80_error_ref_hor_virstride = hw_regs->h265d_paras.reg77_pp_m_hor_stride;  in hal_h265d_vdpu384a_gen_regs()
940 …hw_regs->h265d_paras.reg81_error_ref_raster_uv_hor_virstride = hw_regs->h265d_paras.reg78_pp_m_uv_…  in hal_h265d_vdpu384a_gen_regs()
941 …      hw_regs->h265d_paras.reg82_error_ref_virstride = hw_regs->h265d_paras.reg79_pp_m_y_virstride;  in hal_h265d_vdpu384a_gen_regs()
1003     hw_regs->h265d_paras.reg66_stream_len = ((dxva_ctx->bitstream_size + 15) & (~15)) + 64;  in hal_h265d_vdpu384a_gen_regs()
1007     aglin_offset =  hw_regs->h265d_paras.reg66_stream_len - dxva_ctx->bitstream_size;  in hal_h265d_vdpu384a_gen_regs()
1093     hw_regs->h265d_paras.reg67_global_len = SPSPPS_ALIGNED_SIZE / 16;  in hal_h265d_vdpu384a_gen_regs()
1155 …vdpu384a_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras);  in hal_h265d_vdpu384a_gen_regs()
1159 …vdpu384a_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras);  in hal_h265d_vdpu384a_gen_regs()
1228         wr_cfg.reg = &hw_regs->h265d_paras;  in hal_h265d_vdpu384a_start()
1229         wr_cfg.size = sizeof(hw_regs->h265d_paras);  in hal_h265d_vdpu384a_start()