Lines Matching refs:hw_regs

154             reg_ctx->g_buf[i].hw_regs = mpp_calloc_size(void, sizeof(Vdpu383H265dRegSet));  in hal_h265d_vdpu383_init()
164 reg_ctx->hw_regs = reg_ctx->g_buf[0].hw_regs; in hal_h265d_vdpu383_init()
210 MPP_FREE(reg_ctx->g_buf[i].hw_regs); in hal_h265d_vdpu383_deinit()
381 Vdpu383H265dRegSet *hw_reg = (Vdpu383H265dRegSet*)(reg_ctx->hw_regs); in hal_h265d_v345_output_pps_packet()
726 Vdpu383H265dRegSet *hw_regs, in hal_h265d_rcb_info_update() argument
736 (void)hw_regs; in hal_h265d_rcb_info_update()
862 Vdpu383H265dRegSet *hw_regs; in hal_h265d_vdpu383_gen_regs() local
894 reg_ctx->hw_regs = reg_ctx->g_buf[i].hw_regs; in hal_h265d_vdpu383_gen_regs()
930 hw_regs = (Vdpu383H265dRegSet*)reg_ctx->hw_regs; in hal_h265d_vdpu383_gen_regs()
931 memset(hw_regs, 0, sizeof(Vdpu383H265dRegSet)); in hal_h265d_vdpu383_gen_regs()
933 if (NULL == reg_ctx->hw_regs) { in hal_h265d_vdpu383_gen_regs()
994 hw_regs->ctrl_regs.reg9.fbc_e = 1; in hal_h265d_vdpu383_gen_regs()
995 hw_regs->h265d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in hal_h265d_vdpu383_gen_regs()
997 hw_regs->h265d_addrs.reg193_fbc_payload_offset = fbd_offset; in hal_h265d_vdpu383_gen_regs()
999 hw_regs->ctrl_regs.reg9.tile_e = 1; in hal_h265d_vdpu383_gen_regs()
1001 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 4 / 16; in hal_h265d_vdpu383_gen_regs()
1003 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 8 / 16; in hal_h265d_vdpu383_gen_regs()
1005 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 12 / 16; in hal_h265d_vdpu383_gen_regs()
1007 hw_regs->h265d_paras.reg68_hor_virstride = stride_y * 6 / 16; in hal_h265d_vdpu383_gen_regs()
1009 hw_regs->h265d_paras.reg70_y_virstride = (virstrid_y + virstrid_uv) / 16; in hal_h265d_vdpu383_gen_regs()
1011 hw_regs->ctrl_regs.reg9.fbc_e = 0; in hal_h265d_vdpu383_gen_regs()
1012 hw_regs->h265d_paras.reg68_hor_virstride = stride_y >> 4; in hal_h265d_vdpu383_gen_regs()
1013 hw_regs->h265d_paras.reg69_raster_uv_hor_virstride = stride_uv >> 4; in hal_h265d_vdpu383_gen_regs()
1014 hw_regs->h265d_paras.reg70_y_virstride = virstrid_y >> 4; in hal_h265d_vdpu383_gen_regs()
1016hw_regs->h265d_paras.reg80_error_ref_hor_virstride = hw_regs->h265d_paras.reg68_hor_virstride; in hal_h265d_vdpu383_gen_regs()
1017hw_regs->h265d_paras.reg81_error_ref_raster_uv_hor_virstride = hw_regs->h265d_paras.reg69_raster_u… in hal_h265d_vdpu383_gen_regs()
1018 hw_regs->h265d_paras.reg82_error_ref_virstride = hw_regs->h265d_paras.reg70_y_virstride; in hal_h265d_vdpu383_gen_regs()
1029 hw_regs->h265d_addrs.reg168_decout_base = mpp_buffer_get_fd(framebuf); //just index need map in hal_h265d_vdpu383_gen_regs()
1030 hw_regs->h265d_addrs.reg169_error_ref_base = mpp_buffer_get_fd(framebuf); in hal_h265d_vdpu383_gen_regs()
1034 if (hw_regs->h265d_addrs.reg168_decout_base == 0) { in hal_h265d_vdpu383_gen_regs()
1039 hw_regs->h265d_addrs.reg168_decout_base = fd; in hal_h265d_vdpu383_gen_regs()
1040 hw_regs->h265d_addrs.reg192_payload_st_cur_base = fd; in hal_h265d_vdpu383_gen_regs()
1043 hw_regs->h265d_addrs.reg216_colmv_cur_base = mpp_buffer_get_fd(mv_buf->buf[0]); in hal_h265d_vdpu383_gen_regs()
1072 hw_regs->common_addr.reg128_strm_base = mpp_buffer_get_fd(streambuf); in hal_h265d_vdpu383_gen_regs()
1073 hw_regs->h265d_paras.reg66_stream_len = ((dxva_ctx->bitstream_size + 15) & (~15)) + 64; in hal_h265d_vdpu383_gen_regs()
1074 aglin_offset = hw_regs->h265d_paras.reg66_stream_len - dxva_ctx->bitstream_size; in hal_h265d_vdpu383_gen_regs()
1079 hw_regs->ctrl_regs.reg8_dec_mode = 0; // hevc in hal_h265d_vdpu383_gen_regs()
1080 hw_regs->ctrl_regs.reg9.buf_empty_en = 0; in hal_h265d_vdpu383_gen_regs()
1082 hw_regs->ctrl_regs.reg10.strmd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1083 hw_regs->ctrl_regs.reg10.inter_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1084 hw_regs->ctrl_regs.reg10.intra_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1085 hw_regs->ctrl_regs.reg10.transd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1086 hw_regs->ctrl_regs.reg10.recon_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1087 hw_regs->ctrl_regs.reg10.filterd_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1088 hw_regs->ctrl_regs.reg10.bus_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1089 hw_regs->ctrl_regs.reg10.ctrl_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1090 hw_regs->ctrl_regs.reg10.rcb_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1091 hw_regs->ctrl_regs.reg10.err_prc_auto_gating_e = 1; in hal_h265d_vdpu383_gen_regs()
1095 hw_regs->ctrl_regs.reg16.error_proc_disable = 1; in hal_h265d_vdpu383_gen_regs()
1096 hw_regs->ctrl_regs.reg16.error_spread_disable = 0; in hal_h265d_vdpu383_gen_regs()
1097 hw_regs->ctrl_regs.reg16.roi_error_ctu_cal_en = 0; in hal_h265d_vdpu383_gen_regs()
1099 hw_regs->ctrl_regs.reg20_cabac_error_en_lowbits = 0xffffffff; in hal_h265d_vdpu383_gen_regs()
1100 hw_regs->ctrl_regs.reg21_cabac_error_en_highbits = 0x3ff3f9ff; in hal_h265d_vdpu383_gen_regs()
1102 hw_regs->ctrl_regs.reg13_core_timeout_threshold = 0xffff; in hal_h265d_vdpu383_gen_regs()
1105 valid_ref = hw_regs->h265d_addrs.reg168_decout_base; in hal_h265d_vdpu383_gen_regs()
1108 hw_regs->h265d_addrs.reg169_error_ref_base = valid_ref; in hal_h265d_vdpu383_gen_regs()
1125 hw_regs->h265d_addrs.reg170_185_ref_base[i] = mpp_buffer_get_fd(framebuf); in hal_h265d_vdpu383_gen_regs()
1126hw_regs->h265d_addrs.reg195_210_payload_st_ref_base[i] = mpp_buffer_get_fd(framebuf); in hal_h265d_vdpu383_gen_regs()
1127 valid_ref = hw_regs->h265d_addrs.reg170_185_ref_base[i]; in hal_h265d_vdpu383_gen_regs()
1132hw_regs->h265d_addrs.reg169_error_ref_base = hw_regs->h265d_addrs.reg170_185_ref_base[i]; in hal_h265d_vdpu383_gen_regs()
1134 hw_regs->ctrl_regs.reg16.error_proc_disable = 1; in hal_h265d_vdpu383_gen_regs()
1137 hw_regs->h265d_addrs.reg170_185_ref_base[i] = valid_ref; in hal_h265d_vdpu383_gen_regs()
1138 hw_regs->h265d_addrs.reg195_210_payload_st_ref_base[i] = valid_ref; in hal_h265d_vdpu383_gen_regs()
1142 hw_regs->h265d_addrs.reg217_232_colmv_ref_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]); in hal_h265d_vdpu383_gen_regs()
1154 hw_regs->common_addr.reg131_gbl_base = reg_ctx->bufs_fd; in hal_h265d_vdpu383_gen_regs()
1155 hw_regs->h265d_paras.reg67_global_len = 0xc; //22 * 8; in hal_h265d_vdpu383_gen_regs()
1159 hw_regs->common_addr.reg129_rps_base = reg_ctx->bufs_fd; in hal_h265d_vdpu383_gen_regs()
1179hw_regs->h265d_addrs.reg170_185_ref_base[i] = hw_regs->h265d_addrs.reg169_error_ref_base; in hal_h265d_vdpu383_gen_regs()
1180hw_regs->h265d_addrs.reg195_210_payload_st_ref_base[i] = hw_regs->h265d_addrs.reg169_error_ref_bas… in hal_h265d_vdpu383_gen_regs()
1181hw_regs->h265d_addrs.reg217_232_colmv_ref_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]); in hal_h265d_vdpu383_gen_regs()
1185hw_regs->h265d_addrs.reg170_185_ref_base[i] = hw_regs->h265d_addrs.reg169_error_ref_base; in hal_h265d_vdpu383_gen_regs()
1186hw_regs->h265d_addrs.reg195_210_payload_st_ref_base[i] = hw_regs->h265d_addrs.reg169_error_ref_bas… in hal_h265d_vdpu383_gen_regs()
1187 hw_regs->h265d_addrs.reg217_232_colmv_ref_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]); in hal_h265d_vdpu383_gen_regs()
1191 hal_h265d_rcb_info_update(hal, dxva_ctx, hw_regs, width, height); in hal_h265d_vdpu383_gen_regs()
1192 vdpu383_setup_rcb(&hw_regs->common_addr, reg_ctx->dev, reg_ctx->fast_mode ? in hal_h265d_vdpu383_gen_regs()
1195 vdpu383_setup_statistic(&hw_regs->ctrl_regs); in hal_h265d_vdpu383_gen_regs()
1211 hw_regs->common_addr.reg133_scale_down_base = mpp_buffer_get_fd(mbuffer); in hal_h265d_vdpu383_gen_regs()
1214 hw_regs->h265d_addrs.reg168_decout_base = fd; in hal_h265d_vdpu383_gen_regs()
1215 hw_regs->h265d_addrs.reg192_payload_st_cur_base = fd; in hal_h265d_vdpu383_gen_regs()
1216 hw_regs->h265d_addrs.reg169_error_ref_base = fd; in hal_h265d_vdpu383_gen_regs()
1217 … vdpu383_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras); in hal_h265d_vdpu383_gen_regs()
1220 hw_regs->common_addr.reg133_scale_down_base = mpp_buffer_get_fd(mbuffer); in hal_h265d_vdpu383_gen_regs()
1221 … vdpu383_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras); in hal_h265d_vdpu383_gen_regs()
1225 hw_regs->ctrl_regs.reg9.scale_down_en = 0; in hal_h265d_vdpu383_gen_regs()
1237 Vdpu383H265dRegSet *hw_regs = NULL; in hal_h265d_vdpu383_start() local
1250 p = (RK_U8*)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu383_start()
1251 hw_regs = ( Vdpu383H265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu383_start()
1253 p = (RK_U8*)reg_ctx->hw_regs; in hal_h265d_vdpu383_start()
1254 hw_regs = ( Vdpu383H265dRegSet *)reg_ctx->hw_regs; in hal_h265d_vdpu383_start()
1257 if (hw_regs == NULL) { in hal_h265d_vdpu383_start()
1272 wr_cfg.reg = &hw_regs->ctrl_regs; in hal_h265d_vdpu383_start()
1273 wr_cfg.size = sizeof(hw_regs->ctrl_regs); in hal_h265d_vdpu383_start()
1281 wr_cfg.reg = &hw_regs->common_addr; in hal_h265d_vdpu383_start()
1282 wr_cfg.size = sizeof(hw_regs->common_addr); in hal_h265d_vdpu383_start()
1290 wr_cfg.reg = &hw_regs->h265d_paras; in hal_h265d_vdpu383_start()
1291 wr_cfg.size = sizeof(hw_regs->h265d_paras); in hal_h265d_vdpu383_start()
1299 wr_cfg.reg = &hw_regs->h265d_addrs; in hal_h265d_vdpu383_start()
1300 wr_cfg.size = sizeof(hw_regs->h265d_addrs); in hal_h265d_vdpu383_start()
1308 rd_cfg.reg = &hw_regs->ctrl_regs.reg15; in hal_h265d_vdpu383_start()
1309 rd_cfg.size = sizeof(hw_regs->ctrl_regs.reg15); in hal_h265d_vdpu383_start()
1337 Vdpu383H265dRegSet *hw_regs = NULL; in hal_h265d_vdpu383_wait() local
1341 hw_regs = ( Vdpu383H265dRegSet *)reg_ctx->g_buf[index].hw_regs; in hal_h265d_vdpu383_wait()
1343 hw_regs = ( Vdpu383H265dRegSet *)reg_ctx->hw_regs; in hal_h265d_vdpu383_wait()
1346 p = (RK_U8*)hw_regs; in hal_h265d_vdpu383_wait()
1361 (!hw_regs->ctrl_regs.reg15.rkvdec_frame_rdy_sta) || in hal_h265d_vdpu383_wait()
1362 hw_regs->ctrl_regs.reg15.rkvdec_strm_error_sta || in hal_h265d_vdpu383_wait()
1363 hw_regs->ctrl_regs.reg15.rkvdec_core_timeout_sta || in hal_h265d_vdpu383_wait()
1364 hw_regs->ctrl_regs.reg15.rkvdec_ip_timeout_sta || in hal_h265d_vdpu383_wait()
1365 hw_regs->ctrl_regs.reg15.rkvdec_bus_error_sta || in hal_h265d_vdpu383_wait()
1366 hw_regs->ctrl_regs.reg15.rkvdec_buffer_empty_sta || in hal_h265d_vdpu383_wait()
1367 hw_regs->ctrl_regs.reg15.rkvdec_colmv_ref_error_sta) { in hal_h265d_vdpu383_wait()