994             hw_regs->ctrl_regs.reg9.fbc_e = 1;  in hal_h265d_vdpu383_gen_regs()
999             hw_regs->ctrl_regs.reg9.tile_e = 1;  in hal_h265d_vdpu383_gen_regs()
1011             hw_regs->ctrl_regs.reg9.fbc_e = 0;  in hal_h265d_vdpu383_gen_regs()
1079     hw_regs->ctrl_regs.reg8_dec_mode = 0; // hevc  in hal_h265d_vdpu383_gen_regs()
1080     hw_regs->ctrl_regs.reg9.buf_empty_en = 0;  in hal_h265d_vdpu383_gen_regs()
1082     hw_regs->ctrl_regs.reg10.strmd_auto_gating_e      = 1;  in hal_h265d_vdpu383_gen_regs()
1083     hw_regs->ctrl_regs.reg10.inter_auto_gating_e      = 1;  in hal_h265d_vdpu383_gen_regs()
1084     hw_regs->ctrl_regs.reg10.intra_auto_gating_e      = 1;  in hal_h265d_vdpu383_gen_regs()
1085     hw_regs->ctrl_regs.reg10.transd_auto_gating_e     = 1;  in hal_h265d_vdpu383_gen_regs()
1086     hw_regs->ctrl_regs.reg10.recon_auto_gating_e      = 1;  in hal_h265d_vdpu383_gen_regs()
1087     hw_regs->ctrl_regs.reg10.filterd_auto_gating_e    = 1;  in hal_h265d_vdpu383_gen_regs()
1088     hw_regs->ctrl_regs.reg10.bus_auto_gating_e        = 1;  in hal_h265d_vdpu383_gen_regs()
1089     hw_regs->ctrl_regs.reg10.ctrl_auto_gating_e       = 1;  in hal_h265d_vdpu383_gen_regs()
1090     hw_regs->ctrl_regs.reg10.rcb_auto_gating_e        = 1;  in hal_h265d_vdpu383_gen_regs()
1091     hw_regs->ctrl_regs.reg10.err_prc_auto_gating_e    = 1;  in hal_h265d_vdpu383_gen_regs()
1095     hw_regs->ctrl_regs.reg16.error_proc_disable = 1;  in hal_h265d_vdpu383_gen_regs()
1096     hw_regs->ctrl_regs.reg16.error_spread_disable = 0;  in hal_h265d_vdpu383_gen_regs()
1097     hw_regs->ctrl_regs.reg16.roi_error_ctu_cal_en = 0;  in hal_h265d_vdpu383_gen_regs()
1099     hw_regs->ctrl_regs.reg20_cabac_error_en_lowbits = 0xffffffff;  in hal_h265d_vdpu383_gen_regs()
1100     hw_regs->ctrl_regs.reg21_cabac_error_en_highbits = 0x3ff3f9ff;  in hal_h265d_vdpu383_gen_regs()
1102     hw_regs->ctrl_regs.reg13_core_timeout_threshold = 0xffff;  in hal_h265d_vdpu383_gen_regs()
1134                     hw_regs->ctrl_regs.reg16.error_proc_disable = 1;  in hal_h265d_vdpu383_gen_regs()
1195     vdpu383_setup_statistic(&hw_regs->ctrl_regs);  in hal_h265d_vdpu383_gen_regs()
1217 … vdpu383_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras);  in hal_h265d_vdpu383_gen_regs()
1221 … vdpu383_setup_down_scale(mframe, reg_ctx->dev, &hw_regs->ctrl_regs, (void*)&hw_regs->h265d_paras);  in hal_h265d_vdpu383_gen_regs()
1225             hw_regs->ctrl_regs.reg9.scale_down_en = 0;  in hal_h265d_vdpu383_gen_regs()
1272         wr_cfg.reg = &hw_regs->ctrl_regs;  in hal_h265d_vdpu383_start()
1273         wr_cfg.size = sizeof(hw_regs->ctrl_regs);  in hal_h265d_vdpu383_start()
1308         rd_cfg.reg = &hw_regs->ctrl_regs.reg15;  in hal_h265d_vdpu383_start()
1309         rd_cfg.size = sizeof(hw_regs->ctrl_regs.reg15);  in hal_h265d_vdpu383_start()
1361         (!hw_regs->ctrl_regs.reg15.rkvdec_frame_rdy_sta) ||  in hal_h265d_vdpu383_wait()
1362         hw_regs->ctrl_regs.reg15.rkvdec_strm_error_sta ||  in hal_h265d_vdpu383_wait()
1363         hw_regs->ctrl_regs.reg15.rkvdec_core_timeout_sta ||  in hal_h265d_vdpu383_wait()
1364         hw_regs->ctrl_regs.reg15.rkvdec_ip_timeout_sta ||  in hal_h265d_vdpu383_wait()
1365         hw_regs->ctrl_regs.reg15.rkvdec_bus_error_sta ||  in hal_h265d_vdpu383_wait()
1366         hw_regs->ctrl_regs.reg15.rkvdec_buffer_empty_sta ||  in hal_h265d_vdpu383_wait()
1367         hw_regs->ctrl_regs.reg15.rkvdec_colmv_ref_error_sta) {  in hal_h265d_vdpu383_wait()