Lines Matching refs:pp
239 if (dxva_cxt->pp.ps_update_flag) { in hal_h265d_v345_output_pps_packet()
251 mpp_put_bits(&bp, dxva_cxt->pp.vps_id , 4); in hal_h265d_v345_output_pps_packet()
252 mpp_put_bits(&bp, dxva_cxt->pp.sps_id , 4); in hal_h265d_v345_output_pps_packet()
253 mpp_put_bits(&bp, dxva_cxt->pp.chroma_format_idc , 2); in hal_h265d_v345_output_pps_packet()
255 log2_min_cb_size = dxva_cxt->pp.log2_min_luma_coding_block_size_minus3 + 3; in hal_h265d_v345_output_pps_packet()
256 width = (dxva_cxt->pp.PicWidthInMinCbsY << log2_min_cb_size); in hal_h265d_v345_output_pps_packet()
257 height = (dxva_cxt->pp.PicHeightInMinCbsY << log2_min_cb_size); in hal_h265d_v345_output_pps_packet()
261 mpp_put_bits(&bp, dxva_cxt->pp.bit_depth_luma_minus8 + 8 , 4); in hal_h265d_v345_output_pps_packet()
262 mpp_put_bits(&bp, dxva_cxt->pp.bit_depth_chroma_minus8 + 8 , 4); in hal_h265d_v345_output_pps_packet()
263 mpp_put_bits(&bp, dxva_cxt->pp.log2_max_pic_order_cnt_lsb_minus4 + 4 , 5); in hal_h265d_v345_output_pps_packet()
264 …mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size , 2); //log2_maxa_coding… in hal_h265d_v345_output_pps_packet()
265 mpp_put_bits(&bp, dxva_cxt->pp.log2_min_luma_coding_block_size_minus3 + 3 , 3); in hal_h265d_v345_output_pps_packet()
266 mpp_put_bits(&bp, dxva_cxt->pp.log2_min_transform_block_size_minus2 + 2 , 3); in hal_h265d_v345_output_pps_packet()
268 mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_transform_block_size , 2); in hal_h265d_v345_output_pps_packet()
269 mpp_put_bits(&bp, dxva_cxt->pp.max_transform_hierarchy_depth_inter , 3); in hal_h265d_v345_output_pps_packet()
270 mpp_put_bits(&bp, dxva_cxt->pp.max_transform_hierarchy_depth_intra , 3); in hal_h265d_v345_output_pps_packet()
271 mpp_put_bits(&bp, dxva_cxt->pp.scaling_list_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
272 mpp_put_bits(&bp, dxva_cxt->pp.amp_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
273 mpp_put_bits(&bp, dxva_cxt->pp.sample_adaptive_offset_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
275 mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
276 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.pcm_sample_bit_depth_luma_minus1 +… in hal_h265d_v345_output_pps_packet()
277 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.pcm_sample_bit_depth_chroma_minus1… in hal_h265d_v345_output_pps_packet()
278 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_loop_filter_disabled_flag … in hal_h265d_v345_output_pps_packet()
279 …mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_pcm_luma_coding_block_size … in hal_h265d_v345_output_pps_packet()
280 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.log2_min_pcm_luma_coding_block_siz… in hal_h265d_v345_output_pps_packet()
282 mpp_put_bits(&bp, dxva_cxt->pp.num_short_term_ref_pic_sets , 7); in hal_h265d_v345_output_pps_packet()
283 mpp_put_bits(&bp, dxva_cxt->pp.long_term_ref_pics_present_flag , 1); in hal_h265d_v345_output_pps_packet()
284 mpp_put_bits(&bp, dxva_cxt->pp.num_long_term_ref_pics_sps , 6); in hal_h265d_v345_output_pps_packet()
285 mpp_put_bits(&bp, dxva_cxt->pp.sps_temporal_mvp_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
286 mpp_put_bits(&bp, dxva_cxt->pp.strong_intra_smoothing_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
291 mpp_put_bits(&bp, dxva_cxt->pp.sps_max_dec_pic_buffering_minus1, 4); in hal_h265d_v345_output_pps_packet()
295 mpp_put_bits(&bp, dxva_cxt->pp.pps_id , 6 ); in hal_h265d_v345_output_pps_packet()
296 mpp_put_bits(&bp, dxva_cxt->pp.sps_id , 4 ); in hal_h265d_v345_output_pps_packet()
297 mpp_put_bits(&bp, dxva_cxt->pp.dependent_slice_segments_enabled_flag , 1 ); in hal_h265d_v345_output_pps_packet()
298 mpp_put_bits(&bp, dxva_cxt->pp.output_flag_present_flag , 1 ); in hal_h265d_v345_output_pps_packet()
299 mpp_put_bits(&bp, dxva_cxt->pp.num_extra_slice_header_bits , 13); in hal_h265d_v345_output_pps_packet()
300 mpp_put_bits(&bp, dxva_cxt->pp.sign_data_hiding_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
301 mpp_put_bits(&bp, dxva_cxt->pp.cabac_init_present_flag , 1); in hal_h265d_v345_output_pps_packet()
302 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4);//31 bits in hal_h265d_v345_output_pps_packet()
303 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l1_default_active_minus1 + 1 , 4); in hal_h265d_v345_output_pps_packet()
304 mpp_put_bits(&bp, dxva_cxt->pp.init_qp_minus26 , 7); in hal_h265d_v345_output_pps_packet()
305 mpp_put_bits(&bp, dxva_cxt->pp.constrained_intra_pred_flag , 1); in hal_h265d_v345_output_pps_packet()
306 mpp_put_bits(&bp, dxva_cxt->pp.transform_skip_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
307 mpp_put_bits(&bp, dxva_cxt->pp.cu_qp_delta_enabled_flag , 1); //164 in hal_h265d_v345_output_pps_packet()
309 dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size - in hal_h265d_v345_output_pps_packet()
310 dxva_cxt->pp.diff_cu_qp_delta_depth , 3); in hal_h265d_v345_output_pps_packet()
313 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size, dxva_cxt->pp.diff_cu_qp_delta_depth ); in hal_h265d_v345_output_pps_packet()
315 mpp_put_bits(&bp, dxva_cxt->pp.pps_cb_qp_offset , 5); in hal_h265d_v345_output_pps_packet()
316 mpp_put_bits(&bp, dxva_cxt->pp.pps_cr_qp_offset , 5); in hal_h265d_v345_output_pps_packet()
317 mpp_put_bits(&bp, dxva_cxt->pp.pps_slice_chroma_qp_offsets_present_flag , 1); in hal_h265d_v345_output_pps_packet()
318 mpp_put_bits(&bp, dxva_cxt->pp.weighted_pred_flag , 1); in hal_h265d_v345_output_pps_packet()
319 mpp_put_bits(&bp, dxva_cxt->pp.weighted_bipred_flag , 1); in hal_h265d_v345_output_pps_packet()
320 mpp_put_bits(&bp, dxva_cxt->pp.transquant_bypass_enabled_flag , 1 ); in hal_h265d_v345_output_pps_packet()
321 mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag , 1 ); in hal_h265d_v345_output_pps_packet()
322 mpp_put_bits(&bp, dxva_cxt->pp.entropy_coding_sync_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
323 mpp_put_bits(&bp, dxva_cxt->pp.pps_loop_filter_across_slices_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
324 mpp_put_bits(&bp, dxva_cxt->pp.loop_filter_across_tiles_enabled_flag , 1); //185 in hal_h265d_v345_output_pps_packet()
325 mpp_put_bits(&bp, dxva_cxt->pp.deblocking_filter_override_enabled_flag , 1); in hal_h265d_v345_output_pps_packet()
326 mpp_put_bits(&bp, dxva_cxt->pp.pps_deblocking_filter_disabled_flag , 1); in hal_h265d_v345_output_pps_packet()
327 mpp_put_bits(&bp, dxva_cxt->pp.pps_beta_offset_div2 , 4); in hal_h265d_v345_output_pps_packet()
328 mpp_put_bits(&bp, dxva_cxt->pp.pps_tc_offset_div2 , 4); in hal_h265d_v345_output_pps_packet()
329 mpp_put_bits(&bp, dxva_cxt->pp.lists_modification_present_flag , 1); in hal_h265d_v345_output_pps_packet()
330 mpp_put_bits(&bp, dxva_cxt->pp.log2_parallel_merge_level_minus2 + 2 , 3); in hal_h265d_v345_output_pps_packet()
331 mpp_put_bits(&bp, dxva_cxt->pp.slice_segment_header_extension_present_flag , 1); in hal_h265d_v345_output_pps_packet()
333 …mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag ? dxva_cxt->pp.num_tile_columns_minus1 + 1 : 0, … in hal_h265d_v345_output_pps_packet()
334 …mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag ? dxva_cxt->pp.num_tile_rows_minus1 + 1 : 0 , 5 … in hal_h265d_v345_output_pps_packet()
345 if (dxva_cxt->pp.tiles_enabled_flag) { in hal_h265d_v345_output_pps_packet()
347 if (dxva_cxt->pp.uniform_spacing_flag == 0) { in hal_h265d_v345_output_pps_packet()
348 … RK_S32 maxcuwidth = dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_size; in hal_h265d_v345_output_pps_packet()
354 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_v345_output_pps_packet()
355 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()
361 for (i = 0; i < dxva_cxt->pp.num_tile_rows_minus1; i++) { in hal_h265d_v345_output_pps_packet()
362 row_height[i] = dxva_cxt->pp.row_height_minus1[i] + 1; in hal_h265d_v345_output_pps_packet()
371 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)) - 1) in hal_h265d_v345_output_pps_packet()
373 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)); in hal_h265d_v345_output_pps_packet()
376 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)) - 1) in hal_h265d_v345_output_pps_packet()
378 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)); in hal_h265d_v345_output_pps_packet()
380 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
381 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
382 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_v345_output_pps_packet()
384 for (i = 0; i < dxva_cxt->pp.num_tile_rows_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
385 … row_height[i] = ((i + 1) * pic_in_cts_height) / (dxva_cxt->pp.num_tile_rows_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
386 … (i * pic_in_cts_height) / (dxva_cxt->pp.num_tile_rows_minus1 + 1); in hal_h265d_v345_output_pps_packet()
390 …RK_S32 MaxCUWidth = (1 << (dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_siz… in hal_h265d_v345_output_pps_packet()
413 if (dxva_cxt->pp.scaling_list_enabled_flag) { in hal_h265d_v345_output_pps_packet()
416 if (dxva_cxt->pp.scaling_list_data_present_flag) { in hal_h265d_v345_output_pps_packet()
417 addr = (dxva_cxt->pp.pps_id + 16) * 1360; in hal_h265d_v345_output_pps_packet()
418 } else if (dxva_cxt->pp.scaling_list_enabled_flag) { in hal_h265d_v345_output_pps_packet()
419 addr = dxva_cxt->pp.sps_id * 1360; in hal_h265d_v345_output_pps_packet()
464 if (dxva_cxt->pp.ps_update_flag || dxva_cxt->pp.scaling_list_enabled_flag) { in hal_h265d_output_pps_packet()
477 mpp_put_bits(&bp, dxva_cxt->pp.vps_id , 4); in hal_h265d_output_pps_packet()
478 mpp_put_bits(&bp, dxva_cxt->pp.sps_id , 4); in hal_h265d_output_pps_packet()
479 mpp_put_bits(&bp, dxva_cxt->pp.chroma_format_idc , 2); in hal_h265d_output_pps_packet()
481 log2_min_cb_size = dxva_cxt->pp.log2_min_luma_coding_block_size_minus3 + 3; in hal_h265d_output_pps_packet()
482 width = (dxva_cxt->pp.PicWidthInMinCbsY << log2_min_cb_size); in hal_h265d_output_pps_packet()
483 height = (dxva_cxt->pp.PicHeightInMinCbsY << log2_min_cb_size); in hal_h265d_output_pps_packet()
487 mpp_put_bits(&bp, dxva_cxt->pp.bit_depth_luma_minus8 + 8 , 4); in hal_h265d_output_pps_packet()
488 mpp_put_bits(&bp, dxva_cxt->pp.bit_depth_chroma_minus8 + 8 , 4); in hal_h265d_output_pps_packet()
489 mpp_put_bits(&bp, dxva_cxt->pp.log2_max_pic_order_cnt_lsb_minus4 + 4 , 5); in hal_h265d_output_pps_packet()
490 …mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size , 2); //log2_maxa_coding… in hal_h265d_output_pps_packet()
491 mpp_put_bits(&bp, dxva_cxt->pp.log2_min_luma_coding_block_size_minus3 + 3 , 3); in hal_h265d_output_pps_packet()
492 mpp_put_bits(&bp, dxva_cxt->pp.log2_min_transform_block_size_minus2 + 2 , 3); in hal_h265d_output_pps_packet()
494 mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_transform_block_size , 2); in hal_h265d_output_pps_packet()
495 mpp_put_bits(&bp, dxva_cxt->pp.max_transform_hierarchy_depth_inter , 3); in hal_h265d_output_pps_packet()
496 mpp_put_bits(&bp, dxva_cxt->pp.max_transform_hierarchy_depth_intra , 3); in hal_h265d_output_pps_packet()
497 mpp_put_bits(&bp, dxva_cxt->pp.scaling_list_enabled_flag , 1); in hal_h265d_output_pps_packet()
498 mpp_put_bits(&bp, dxva_cxt->pp.amp_enabled_flag , 1); in hal_h265d_output_pps_packet()
499 mpp_put_bits(&bp, dxva_cxt->pp.sample_adaptive_offset_enabled_flag , 1); in hal_h265d_output_pps_packet()
501 mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag , 1); in hal_h265d_output_pps_packet()
502 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.pcm_sample_bit_depth_luma_minus1 +… in hal_h265d_output_pps_packet()
503 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.pcm_sample_bit_depth_chroma_minus1… in hal_h265d_output_pps_packet()
504 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_loop_filter_disabled_flag … in hal_h265d_output_pps_packet()
505 …mpp_put_bits(&bp, dxva_cxt->pp.log2_diff_max_min_pcm_luma_coding_block_size … in hal_h265d_output_pps_packet()
506 …mpp_put_bits(&bp, dxva_cxt->pp.pcm_enabled_flag ? (dxva_cxt->pp.log2_min_pcm_luma_coding_block_siz… in hal_h265d_output_pps_packet()
508 mpp_put_bits(&bp, dxva_cxt->pp.num_short_term_ref_pic_sets , 7); in hal_h265d_output_pps_packet()
509 mpp_put_bits(&bp, dxva_cxt->pp.long_term_ref_pics_present_flag , 1); in hal_h265d_output_pps_packet()
510 mpp_put_bits(&bp, dxva_cxt->pp.num_long_term_ref_pics_sps , 6); in hal_h265d_output_pps_packet()
511 mpp_put_bits(&bp, dxva_cxt->pp.sps_temporal_mvp_enabled_flag , 1); in hal_h265d_output_pps_packet()
512 mpp_put_bits(&bp, dxva_cxt->pp.strong_intra_smoothing_enabled_flag , 1); in hal_h265d_output_pps_packet()
519 mpp_put_bits(&bp, dxva_cxt->pp.pps_id , 6 ); in hal_h265d_output_pps_packet()
520 mpp_put_bits(&bp, dxva_cxt->pp.sps_id , 4 ); in hal_h265d_output_pps_packet()
521 mpp_put_bits(&bp, dxva_cxt->pp.dependent_slice_segments_enabled_flag , 1 ); in hal_h265d_output_pps_packet()
522 mpp_put_bits(&bp, dxva_cxt->pp.output_flag_present_flag , 1 ); in hal_h265d_output_pps_packet()
523 mpp_put_bits(&bp, dxva_cxt->pp.num_extra_slice_header_bits , 13); in hal_h265d_output_pps_packet()
524 mpp_put_bits(&bp, dxva_cxt->pp.sign_data_hiding_enabled_flag , 1); in hal_h265d_output_pps_packet()
525 mpp_put_bits(&bp, dxva_cxt->pp.cabac_init_present_flag , 1); in hal_h265d_output_pps_packet()
526 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4); in hal_h265d_output_pps_packet()
527 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l1_default_active_minus1 + 1 , 4); in hal_h265d_output_pps_packet()
528 mpp_put_bits(&bp, dxva_cxt->pp.init_qp_minus26 , 7); in hal_h265d_output_pps_packet()
529 mpp_put_bits(&bp, dxva_cxt->pp.constrained_intra_pred_flag , 1); in hal_h265d_output_pps_packet()
530 mpp_put_bits(&bp, dxva_cxt->pp.transform_skip_enabled_flag , 1); in hal_h265d_output_pps_packet()
531 mpp_put_bits(&bp, dxva_cxt->pp.cu_qp_delta_enabled_flag , 1); in hal_h265d_output_pps_packet()
534 dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size - in hal_h265d_output_pps_packet()
535 dxva_cxt->pp.diff_cu_qp_delta_depth , 3); in hal_h265d_output_pps_packet()
538 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size, dxva_cxt->pp.diff_cu_qp_delta_depth ); in hal_h265d_output_pps_packet()
540 mpp_put_bits(&bp, dxva_cxt->pp.pps_cb_qp_offset , 5); in hal_h265d_output_pps_packet()
541 mpp_put_bits(&bp, dxva_cxt->pp.pps_cr_qp_offset , 5); in hal_h265d_output_pps_packet()
542 mpp_put_bits(&bp, dxva_cxt->pp.pps_slice_chroma_qp_offsets_present_flag , 1); in hal_h265d_output_pps_packet()
543 mpp_put_bits(&bp, dxva_cxt->pp.weighted_pred_flag , 1); in hal_h265d_output_pps_packet()
544 mpp_put_bits(&bp, dxva_cxt->pp.weighted_bipred_flag , 1); in hal_h265d_output_pps_packet()
545 mpp_put_bits(&bp, dxva_cxt->pp.transquant_bypass_enabled_flag , 1); in hal_h265d_output_pps_packet()
546 mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag , 1); in hal_h265d_output_pps_packet()
547 mpp_put_bits(&bp, dxva_cxt->pp.entropy_coding_sync_enabled_flag , 1); in hal_h265d_output_pps_packet()
548 mpp_put_bits(&bp, dxva_cxt->pp.pps_loop_filter_across_slices_enabled_flag , 1); in hal_h265d_output_pps_packet()
549 mpp_put_bits(&bp, dxva_cxt->pp.loop_filter_across_tiles_enabled_flag , 1); in hal_h265d_output_pps_packet()
551 mpp_put_bits(&bp, dxva_cxt->pp.deblocking_filter_override_enabled_flag , 1); in hal_h265d_output_pps_packet()
552 mpp_put_bits(&bp, dxva_cxt->pp.pps_deblocking_filter_disabled_flag , 1); in hal_h265d_output_pps_packet()
553 mpp_put_bits(&bp, dxva_cxt->pp.pps_beta_offset_div2 , 4); in hal_h265d_output_pps_packet()
554 mpp_put_bits(&bp, dxva_cxt->pp.pps_tc_offset_div2 , 4); in hal_h265d_output_pps_packet()
555 mpp_put_bits(&bp, dxva_cxt->pp.lists_modification_present_flag , 1); in hal_h265d_output_pps_packet()
556 mpp_put_bits(&bp, dxva_cxt->pp.log2_parallel_merge_level_minus2 + 2 , 3); in hal_h265d_output_pps_packet()
557 mpp_put_bits(&bp, dxva_cxt->pp.slice_segment_header_extension_present_flag , 1); in hal_h265d_output_pps_packet()
559 mpp_put_bits(&bp, dxva_cxt->pp.num_tile_columns_minus1 + 1, 5); in hal_h265d_output_pps_packet()
560 mpp_put_bits(&bp, dxva_cxt->pp.num_tile_rows_minus1 + 1 , 5 ); in hal_h265d_output_pps_packet()
572 if (dxva_cxt->pp.tiles_enabled_flag) { in hal_h265d_output_pps_packet()
573 if (dxva_cxt->pp.uniform_spacing_flag == 0) { in hal_h265d_output_pps_packet()
574 … RK_S32 maxcuwidth = dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_size; in hal_h265d_output_pps_packet()
580 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_output_pps_packet()
581 column_width[i] = dxva_cxt->pp.column_width_minus1[i] + 1; in hal_h265d_output_pps_packet()
587 for (i = 0; i < dxva_cxt->pp.num_tile_rows_minus1; i++) { in hal_h265d_output_pps_packet()
588 row_height[i] = dxva_cxt->pp.row_height_minus1[i] + 1; in hal_h265d_output_pps_packet()
597 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)) - 1) in hal_h265d_output_pps_packet()
599 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)); in hal_h265d_output_pps_packet()
602 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)) - 1) in hal_h265d_output_pps_packet()
604 … dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size)); in hal_h265d_output_pps_packet()
606 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_output_pps_packet()
607 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_output_pps_packet()
608 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_output_pps_packet()
610 for (i = 0; i < dxva_cxt->pp.num_tile_rows_minus1 + 1; i++) in hal_h265d_output_pps_packet()
611 … row_height[i] = ((i + 1) * pic_in_cts_height) / (dxva_cxt->pp.num_tile_rows_minus1 + 1) - in hal_h265d_output_pps_packet()
612 … (i * pic_in_cts_height) / (dxva_cxt->pp.num_tile_rows_minus1 + 1); in hal_h265d_output_pps_packet()
616 …RK_S32 MaxCUWidth = (1 << (dxva_cxt->pp.log2_diff_max_min_luma_coding_block_size + log2_min_cb_siz… in hal_h265d_output_pps_packet()
636 if (dxva_cxt->pp.scaling_list_data_present_flag) { in hal_h265d_output_pps_packet()
637 addr = (dxva_cxt->pp.pps_id + 16) * 1360; in hal_h265d_output_pps_packet()
638 } else if (dxva_cxt->pp.scaling_list_enabled_flag) { in hal_h265d_output_pps_packet()
639 addr = dxva_cxt->pp.sps_id * 1360; in hal_h265d_output_pps_packet()
673 DXVA_PicParams_HEVC *pp = &dxva_cxt->pp; in h265d_refine_rcb_size() local
674 RK_U32 chroma_fmt_idc = pp->chroma_format_idc;//0 400,1 4202 ,422,3 444 in h265d_refine_rcb_size()
675 RK_U8 bit_depth = MPP_MAX(pp->bit_depth_luma_minus8, pp->bit_depth_chroma_minus8) + 8; in h265d_refine_rcb_size()
676 …RK_U8 ctu_size = 1 << (pp->log2_diff_max_min_luma_coding_block_size + pp->log2_min_luma_coding_blo… in h265d_refine_rcb_size()
677 RK_U32 tile_col_cut_num = pp->num_tile_columns_minus1; in h265d_refine_rcb_size()
776 DXVA_PicParams_HEVC *pp = &dxva_cxt->pp; in hal_h265d_rcb_info_update() local
777 RK_U32 chroma_fmt_idc = pp->chroma_format_idc;//0 400,1 4202 ,422,3 444 in hal_h265d_rcb_info_update()
778 RK_U8 bit_depth = MPP_MAX(pp->bit_depth_luma_minus8, pp->bit_depth_chroma_minus8) + 8; in hal_h265d_rcb_info_update()
779 …RK_U8 ctu_size = 1 << (pp->log2_diff_max_min_luma_coding_block_size + pp->log2_min_luma_coding_blo… in hal_h265d_rcb_info_update()
780 RK_U32 num_tiles = pp->num_tile_rows_minus1 + 1; in hal_h265d_rcb_info_update()
859 DXVA_PicParams_HEVC *pp = &dxva_cxt->pp; in hal_h265d_vdpu34x_gen_regs() local
860 RK_U8 ctu_size = 1 << (pp->log2_diff_max_min_luma_coding_block_size + in hal_h265d_vdpu34x_gen_regs()
861 pp->log2_min_luma_coding_block_size_minus3 + 3); in hal_h265d_vdpu34x_gen_regs()
911 log2_min_cb_size = dxva_cxt->pp.log2_min_luma_coding_block_size_minus3 + 3; in hal_h265d_vdpu34x_gen_regs()
913 width = (dxva_cxt->pp.PicWidthInMinCbsY << log2_min_cb_size); in hal_h265d_vdpu34x_gen_regs()
914 height = (dxva_cxt->pp.PicHeightInMinCbsY << log2_min_cb_size); in hal_h265d_vdpu34x_gen_regs()
939 mpp_buf_slot_get_prop(reg_ctx->slots, dxva_cxt->pp.CurrPic.Index7Bits, in hal_h265d_vdpu34x_gen_regs()
972 mpp_buf_slot_get_prop(reg_ctx->slots, dxva_cxt->pp.CurrPic.Index7Bits, in hal_h265d_vdpu34x_gen_regs()
983 mv_buf = hal_bufs_get_buf(reg_ctx->cmv_bufs, dxva_cxt->pp.CurrPic.Index7Bits); in hal_h265d_vdpu34x_gen_regs()
986 hw_regs->h265d_param.reg65.cur_top_poc = dxva_cxt->pp.CurrPicOrderCntVal; in hal_h265d_vdpu34x_gen_regs()
1027 hw_regs->common.reg012.wr_ddr_align_en = dxva_cxt->pp.tiles_enabled_flag in hal_h265d_vdpu34x_gen_regs()
1047 reg_ctx->error_index[syn->dec.reg_index] = dxva_cxt->pp.CurrPic.Index7Bits; in hal_h265d_vdpu34x_gen_regs()
1050 for (i = 0; i < (RK_S32)MPP_ARRAY_ELEMS(dxva_cxt->pp.RefPicList); i++) { in hal_h265d_vdpu34x_gen_regs()
1051 if (dxva_cxt->pp.RefPicList[i].bPicEntry != 0xff && in hal_h265d_vdpu34x_gen_regs()
1052 dxva_cxt->pp.RefPicList[i].bPicEntry != 0x7f) { in hal_h265d_vdpu34x_gen_regs()
1056 hw_regs->h265d_param.reg67_82_ref_poc[i] = dxva_cxt->pp.PicOrderCntValList[i]; in hal_h265d_vdpu34x_gen_regs()
1058 dxva_cxt->pp.RefPicList[i].Index7Bits, in hal_h265d_vdpu34x_gen_regs()
1060 mpp_buf_slot_get_prop(reg_ctx->slots, dxva_cxt->pp.RefPicList[i].Index7Bits, in hal_h265d_vdpu34x_gen_regs()
1083 …h_dbg(H265H_DBG_TASK_ERR, "cur poc %d, ref poc %d", dxva_cxt->pp.current_poc, dxva_cxt->pp.PicOrde… in hal_h265d_vdpu34x_gen_regs()
1084 … if ((pocdistance(dxva_cxt->pp.PicOrderCntValList[i], dxva_cxt->pp.current_poc) < distance) in hal_h265d_vdpu34x_gen_regs()
1086 … distance = pocdistance(dxva_cxt->pp.PicOrderCntValList[i], dxva_cxt->pp.current_poc); in hal_h265d_vdpu34x_gen_regs()
1088 … reg_ctx->error_index[syn->dec.reg_index] = dxva_cxt->pp.RefPicList[i].Index7Bits; in hal_h265d_vdpu34x_gen_regs()
1091 i, dxva_cxt->pp.PicOrderCntValList[i], in hal_h265d_vdpu34x_gen_regs()
1092 dxva_cxt->pp.RefPicList[i].Index7Bits, in hal_h265d_vdpu34x_gen_regs()
1100 mv_buf = hal_bufs_get_buf(reg_ctx->cmv_bufs, dxva_cxt->pp.RefPicList[i].Index7Bits); in hal_h265d_vdpu34x_gen_regs()
1115 if (reg_ctx->error_index[syn->dec.reg_index] == dxva_cxt->pp.CurrPic.Index7Bits) in hal_h265d_vdpu34x_gen_regs()
1121 if ((reg_ctx->error_index[syn->dec.reg_index] == dxva_cxt->pp.CurrPic.Index7Bits) && in hal_h265d_vdpu34x_gen_regs()
1122 !dxva_cxt->pp.IntraPicFlag) { in hal_h265d_vdpu34x_gen_regs()
1139 hw_regs->common.reg013.cur_pic_is_idr = dxva_cxt->pp.IdrPicFlag;//p_hal->slice_long->idr_flag; in hal_h265d_vdpu34x_gen_regs()