939         MppDevRegWrCfg wr_cfg;  in vdpu383_h264d_start()  local
942         wr_cfg.reg = &regs->ctrl_regs;  in vdpu383_h264d_start()
943         wr_cfg.size = sizeof(regs->ctrl_regs);  in vdpu383_h264d_start()
944         wr_cfg.offset = OFFSET_CTRL_REGS;  in vdpu383_h264d_start()
945         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu383_h264d_start()
951         wr_cfg.reg = &regs->common_addr;  in vdpu383_h264d_start()
952         wr_cfg.size = sizeof(regs->common_addr);  in vdpu383_h264d_start()
953         wr_cfg.offset = OFFSET_COMMON_ADDR_REGS;  in vdpu383_h264d_start()
954         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu383_h264d_start()
960         wr_cfg.reg = &regs->h264d_paras;  in vdpu383_h264d_start()
961         wr_cfg.size = sizeof(regs->h264d_paras);  in vdpu383_h264d_start()
962         wr_cfg.offset = OFFSET_CODEC_PARAS_REGS;  in vdpu383_h264d_start()
963         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu383_h264d_start()
969         wr_cfg.reg = &regs->h264d_addrs;  in vdpu383_h264d_start()
970         wr_cfg.size = sizeof(regs->h264d_addrs);  in vdpu383_h264d_start()
971         wr_cfg.offset = OFFSET_CODEC_ADDR_REGS;  in vdpu383_h264d_start()
972         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu383_h264d_start()