152     RK_S32              width;  member
796                                   RK_S32 width, RK_S32 height)  in h264d_refine_rcb_size()  argument
803     width = MPP_ALIGN(width, H264_CTU_SIZE);  in h264d_refine_rcb_size()
806     if (width > 4096)  in h264d_refine_rcb_size()
807         rcb_bits = ((width + 15) / 16) * 154 * (mbaff ? 2 : 1);  in h264d_refine_rcb_size()
812     if (width > 8192)  in h264d_refine_rcb_size()
813         rcb_bits = ((width - 8192 + 3) / 4) * 2;  in h264d_refine_rcb_size()
824     rcb_bits = width * 42;  in h264d_refine_rcb_size()
829     rcb_bits = width * 44;  in h264d_refine_rcb_size()
832     rcb_bits = width * (2 + (mbaff ? 12 : 6) * bit_depth);  in h264d_refine_rcb_size()
838         rcb_bits = (chroma_format_idc > 1) ? (2 * width * bit_depth) : 0;  in h264d_refine_rcb_size()
853     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in hal_h264d_rcb_info_update()  local
859          ctx->width != width ||  in hal_h264d_rcb_info_update()
864         ctx->rcb_buf_size = vdpu34x_get_rcb_buf_size(ctx->rcb_info, width, height);  in hal_h264d_rcb_info_update()
865         h264d_refine_rcb_size(hal, ctx->rcb_info, regs, width, height);  in hal_h264d_rcb_info_update()
881         ctx->width          = width;  in hal_h264d_rcb_info_update()
888 static MPP_RET vdpu34x_h264d_setup_colmv_buf(void *hal, RK_U32 width, RK_U32 height)  in vdpu34x_h264d_setup_colmv_buf()  argument
895 … mv_size = vdpu34x_get_colmv_size(width, height, ctu_size, colmv_byte, colmv_size, colmv_compress);  in vdpu34x_h264d_setup_colmv_buf()
926     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in vdpu34x_h264d_gen_regs()  local
953     if (vdpu34x_h264d_setup_colmv_buf(hal, width, height))  in vdpu34x_h264d_gen_regs()