rkdec/h264d/hal_h264d_vdpu34x.c

46 #define VDPU34X_CABAC_TAB_ALIGNED_SIZE      (MPP_ALIGN(VDPU34X_CABAC_TAB_SIZE, SZ_4K))
48 #define VDPU34X_SPSPPS_ALIGNED_SIZE         (MPP_ALIGN(VDPU34X_SPSPPS_SIZE, SZ_4K))
49 #define VDPU34X_RPS_ALIGNED_SIZE            (MPP_ALIGN(VDPU34X_RPS_SIZE, SZ_4K))
50 #define VDPU34X_SCALING_LIST_ALIGNED_SIZE   (MPP_ALIGN(VDPU34X_SCALING_LIST_SIZE, SZ_4K))
327     return MPP_ALIGN(val, 16);  in rkv_ver_align()
332     return MPP_ALIGN(val, 16);  in rkv_hor_align()
337     return (MPP_ALIGN(val, 256) | 256);  in rkv_hor_align_256_odds()
342     return (2 * MPP_ALIGN(val, 16));  in rkv_len_align()
347     return ((5 * MPP_ALIGN(val, 16)) / 2);  in rkv_len_align_422()
559             RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K);  in set_registers()
803     width = MPP_ALIGN(width, H264_CTU_SIZE);  in h264d_refine_rcb_size()
804     height = MPP_ALIGN(height, H264_CTU_SIZE);  in h264d_refine_rcb_size()
853     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in hal_h264d_rcb_info_update()
854     RK_S32 height = MPP_ALIGN((p_hal->pp->wFrameHeightInMbsMinus1 + 1) << 4, 64);  in hal_h264d_rcb_info_update()
926     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in vdpu34x_h264d_gen_regs()
927     RK_S32 height = MPP_ALIGN((p_hal->pp->wFrameHeightInMbsMinus1 + 1) << 4, 64);  in vdpu34x_h264d_gen_regs()