Lines Matching refs:p_regs
33 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in set_defalut_parameters() local
35 p_regs->sw54.dec_out_endian = 1; in set_defalut_parameters()
36 p_regs->sw54.dec_in_endian = 0; in set_defalut_parameters()
37 p_regs->sw54.dec_strendian_e = 1; in set_defalut_parameters()
38 p_regs->sw56.dec_max_burlen = 16; in set_defalut_parameters()
39 p_regs->sw50.dec_ascmd0_dis = 0; in set_defalut_parameters()
41 p_regs->sw50.adv_pref_dis = 0; in set_defalut_parameters()
42 p_regs->sw52.adv_pref_thrd = 8; in set_defalut_parameters()
43 p_regs->sw50.adtion_latency = 0; in set_defalut_parameters()
45 p_regs->sw56.dec_data_discd_en = 0; in set_defalut_parameters()
46 p_regs->sw54.dec_out_wordsp = 1; in set_defalut_parameters()
47 p_regs->sw54.dec_in_wordsp = 1; in set_defalut_parameters()
48 p_regs->sw54.dec_strm_wordsp = 1; in set_defalut_parameters()
49 p_regs->sw55.timeout_det_sts = 0; in set_defalut_parameters()
50 p_regs->sw57.dec_clkgate_en = 1; in set_defalut_parameters()
51 p_regs->sw55.dec_irq_dis = 0; in set_defalut_parameters()
53 p_regs->sw56.dec_axi_id_rd = 0xFF; in set_defalut_parameters()
54 p_regs->sw56.dec_axi_id_wr = 0; in set_defalut_parameters()
56 p_regs->sw59.pred_bc_tap_0_0 = 0x3FF; in set_defalut_parameters()
57 p_regs->sw59.pred_bc_tap_0_1 = 5; in set_defalut_parameters()
58 p_regs->sw59.pred_bc_tap_0_2 = 5; in set_defalut_parameters()
59 p_regs->sw153.pred_bc_tap_0_3 = 0x3FF; in set_defalut_parameters()
60 p_regs->sw153.pred_bc_tap_1_0 = 1; in set_defalut_parameters()
61 p_regs->sw153.pred_bc_tap_1_1 = 7; in set_defalut_parameters()
62 p_regs->sw154.pred_bc_tap_1_2 = 7; in set_defalut_parameters()
63 p_regs->sw154.pred_bc_tap_1_3 = 1; in set_defalut_parameters()
65 p_regs->sw50.dec_tiled_lsb = 0; in set_defalut_parameters()
75 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in set_regs_parameters() local
79 p_regs->sw57.timeout_sts_en = 1; in set_regs_parameters()
80 p_regs->sw57.dec_clkgate_en = 1; in set_regs_parameters()
81 p_regs->sw55.dec_irq_dis = 0; in set_regs_parameters()
100 p_regs->sw120.pic_mb_width = (p_syn->pp.horizontalSize + 15) >> 4; in set_regs_parameters()
101 p_regs->sw53.dec_fmt_sel = 11; //!< DEC_MODE_AVS in set_regs_parameters()
104 p_regs->sw57.pic_interlace_e = 0; //!< interlace_e in set_regs_parameters()
105 p_regs->sw57.pic_fieldmode_e = 0; //!< fieldmode_e in set_regs_parameters()
106 p_regs->sw57.pic_topfield_e = 0; //!< topfield_e in set_regs_parameters()
108 p_regs->sw57.pic_interlace_e = 1; in set_regs_parameters()
109 p_regs->sw57.pic_fieldmode_e = 1; in set_regs_parameters()
110 p_regs->sw57.pic_topfield_e = p_hal->first_field; in set_regs_parameters()
113 p_regs->sw120.pic_mb_height_p = (p_syn->pp.verticalSize + 15) >> 4; in set_regs_parameters()
114 p_regs->sw121.avs_h_ext = (p_syn->pp.verticalSize + 15) >> 12; in set_regs_parameters()
115 p_regs->sw57.pic_b_e = (p_syn->pp.picCodingType == BFRAME); in set_regs_parameters()
116 p_regs->sw57.pic_inter_e = (p_syn->pp.picCodingType != IFRAME) ? 1 : 0; in set_regs_parameters()
118 p_regs->sw122.strm_start_bit = 8 * (p_hal->data_offset & 0x7); in set_regs_parameters()
120 p_regs->sw64.rlc_vlc_st_adr = get_packet_fd(p_hal, task->input); in set_regs_parameters()
122 p_regs->sw51.stream_len = p_syn->bitstream_size - p_hal->data_offset; in set_regs_parameters()
123 p_regs->sw50.dec_fixed_quant = p_syn->pp.fixedPictureQp; in set_regs_parameters()
124 p_regs->sw51.init_qp = p_syn->pp.pictureQp; in set_regs_parameters()
126 p_regs->sw63.dec_out_st_adr = get_frame_fd(p_hal, task->output); in set_regs_parameters()
144 p_regs->sw131.refer0_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
145 p_regs->sw148.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
146 p_regs->sw134.refer2_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
147 p_regs->sw135.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
149 p_regs->sw131.refer0_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
150 p_regs->sw148.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
151 p_regs->sw134.refer2_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
152 p_regs->sw135.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
166 p_regs->sw133.ref_dist_cur_2 = tmp; in set_regs_parameters()
167 p_regs->sw133.ref_dist_cur_3 = tmp; in set_regs_parameters()
168 p_regs->sw147.ref_invd_cur_2 = 512 / tmp; in set_regs_parameters()
169 p_regs->sw147.ref_invd_cur_3 = 512 / tmp; in set_regs_parameters()
177 p_regs->sw132.ref_dist_cur_0 = tmp; in set_regs_parameters()
178 p_regs->sw132.ref_dist_cur_1 = tmp; in set_regs_parameters()
179 p_regs->sw146.ref_invd_cur_0 = 512 / tmp; in set_regs_parameters()
180 p_regs->sw146.ref_invd_cur_1 = 512 / tmp; in set_regs_parameters()
188 p_regs->sw129.ref_invd_col_0 = tmp; in set_regs_parameters()
189 p_regs->sw129.ref_invd_col_1 = tmp; in set_regs_parameters()
193 p_regs->sw130.ref_invd_col_2 = tmp; in set_regs_parameters()
194 p_regs->sw130.ref_invd_col_3 = tmp; in set_regs_parameters()
203 p_regs->sw132.ref_dist_cur_0 = tmp; in set_regs_parameters()
204 p_regs->sw132.ref_dist_cur_1 = tmp; in set_regs_parameters()
205 p_regs->sw146.ref_invd_cur_0 = 512 / tmp; in set_regs_parameters()
206 p_regs->sw146.ref_invd_cur_1 = 512 / tmp; in set_regs_parameters()
216 p_regs->sw133.ref_dist_cur_2 = tmp; in set_regs_parameters()
217 p_regs->sw133.ref_dist_cur_3 = tmp; in set_regs_parameters()
218 p_regs->sw147.ref_invd_cur_2 = 512 / tmp; in set_regs_parameters()
219 p_regs->sw147.ref_invd_cur_3 = 512 / tmp; in set_regs_parameters()
221 p_regs->sw129.ref_invd_col_0 = 0; in set_regs_parameters()
222 p_regs->sw129.ref_invd_col_1 = 0; in set_regs_parameters()
223 p_regs->sw130.ref_invd_col_2 = 0; in set_regs_parameters()
224 p_regs->sw130.ref_invd_col_3 = 0; in set_regs_parameters()
239 p_regs->sw133.ref_dist_cur_2 = tmp; in set_regs_parameters()
240 p_regs->sw133.ref_dist_cur_3 = tmp + 1; in set_regs_parameters()
241 p_regs->sw147.ref_invd_cur_2 = 512 / tmp; in set_regs_parameters()
242 p_regs->sw147.ref_invd_cur_3 = 512 / (tmp + 1); in set_regs_parameters()
244 p_regs->sw133.ref_dist_cur_2 = tmp - 1; in set_regs_parameters()
245 p_regs->sw133.ref_dist_cur_3 = tmp; in set_regs_parameters()
246 p_regs->sw147.ref_invd_cur_2 = 512 / (tmp - 1); in set_regs_parameters()
247 p_regs->sw147.ref_invd_cur_3 = 512 / tmp; in set_regs_parameters()
256 p_regs->sw132.ref_dist_cur_0 = (tmp - 1); in set_regs_parameters()
257 p_regs->sw132.ref_dist_cur_1 = tmp; in set_regs_parameters()
258 p_regs->sw146.ref_invd_cur_0 = 512 / (tmp - 1); in set_regs_parameters()
259 p_regs->sw146.ref_invd_cur_1 = 512 / tmp; in set_regs_parameters()
261 p_regs->sw132.ref_dist_cur_0 = tmp; in set_regs_parameters()
262 p_regs->sw132.ref_dist_cur_1 = tmp + 1; in set_regs_parameters()
263 p_regs->sw146.ref_invd_cur_0 = 512 / tmp; in set_regs_parameters()
264 p_regs->sw146.ref_invd_cur_1 = 512 / (tmp + 1); in set_regs_parameters()
275 p_regs->sw129.ref_invd_col_0 = 16384 / (tmp - 1); in set_regs_parameters()
276 p_regs->sw129.ref_invd_col_1 = 16384 / tmp; in set_regs_parameters()
281 p_regs->sw130.ref_invd_col_2 = 16384 / (tmp - 1); in set_regs_parameters()
282 p_regs->sw130.ref_invd_col_3 = 16384 / tmp; in set_regs_parameters()
285 p_regs->sw129.ref_invd_col_0 = 16384 / (tmp - 1); in set_regs_parameters()
286 p_regs->sw129.ref_invd_col_1 = 16384 / tmp; in set_regs_parameters()
288 p_regs->sw129.ref_invd_col_0 = 16384; in set_regs_parameters()
289 p_regs->sw129.ref_invd_col_1 = 16384 / tmp; in set_regs_parameters()
290 p_regs->sw130.ref_invd_col_2 = 16384 / (tmp + 1); in set_regs_parameters()
297 p_regs->sw130.ref_invd_col_2 = 16384 / (tmp - 1); in set_regs_parameters()
298 p_regs->sw130.ref_invd_col_3 = 16384 / tmp; in set_regs_parameters()
300 p_regs->sw130.ref_invd_col_3 = 16384 / tmp; in set_regs_parameters()
312 p_regs->sw132.ref_dist_cur_0 = 1; in set_regs_parameters()
313 p_regs->sw133.ref_dist_cur_2 = tmp + 1; in set_regs_parameters()
315 p_regs->sw146.ref_invd_cur_0 = 512; in set_regs_parameters()
316 p_regs->sw147.ref_invd_cur_2 = 512 / (tmp + 1); in set_regs_parameters()
318 p_regs->sw132.ref_dist_cur_0 = tmp - 1; in set_regs_parameters()
319 p_regs->sw146.ref_invd_cur_0 = 512 / (tmp - 1); in set_regs_parameters()
321 p_regs->sw132.ref_dist_cur_1 = tmp; in set_regs_parameters()
322 p_regs->sw146.ref_invd_cur_1 = 512 / tmp; in set_regs_parameters()
332 p_regs->sw133.ref_dist_cur_2 = tmp - 1; in set_regs_parameters()
333 p_regs->sw133.ref_dist_cur_3 = tmp; in set_regs_parameters()
335 p_regs->sw147.ref_invd_cur_2 = 512 / (tmp - 1); in set_regs_parameters()
336 p_regs->sw147.ref_invd_cur_3 = 512 / tmp; in set_regs_parameters()
338 p_regs->sw133.ref_dist_cur_3 = tmp; in set_regs_parameters()
339 p_regs->sw147.ref_invd_cur_3 = 512 / tmp; in set_regs_parameters()
342 p_regs->sw129.ref_invd_col_0 = 0; in set_regs_parameters()
343 p_regs->sw129.ref_invd_col_1 = 0; in set_regs_parameters()
344 p_regs->sw130.ref_invd_col_2 = 0; in set_regs_parameters()
345 p_regs->sw130.ref_invd_col_3 = 0; in set_regs_parameters()
349 p_regs->sw52.startmb_x = 0; in set_regs_parameters()
350 p_regs->sw52.startmb_y = 0; in set_regs_parameters()
352 p_regs->sw50.filtering_dis = p_syn->pp.loopFilterDisable; in set_regs_parameters()
353 p_regs->sw122.alpha_offset = p_syn->pp.alphaOffset; in set_regs_parameters()
354 p_regs->sw122.beta_offset = p_syn->pp.betaOffset; in set_regs_parameters()
355 p_regs->sw50.skip_mode = p_syn->pp.skipModeFlag; in set_regs_parameters()
356 p_regs->sw120.pic_refer_flag = p_syn->pp.pictureReferenceFlag; in set_regs_parameters()
360 p_regs->sw57.dmmv_wr_en = 1; in set_regs_parameters()
362 p_regs->sw57.dmmv_wr_en = 0; in set_regs_parameters()
366 p_regs->sw62.dmmv_st_adr = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
386 p_regs->sw136.prev_anc_type = prev_anc_type; in set_regs_parameters()
396 p_regs->sw57.dec_out_dis = 0; in set_regs_parameters()
397 p_regs->sw57.dec_e = 1; in set_regs_parameters()
435 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in repeat_other_field() local
438 p_hal->data_offset = p_regs->sw64.rlc_vlc_st_adr >> 10; in repeat_other_field()
485 p_hal->p_regs = mpp_calloc_size(RK_U32, sizeof(AvsdVdpu2Regs_t)); in hal_avsd_vdpu2_init()
486 MEM_CHECK(ret, p_hal->p_regs); in hal_avsd_vdpu2_init()
526 MPP_FREE(p_hal->p_regs); in hal_avsd_vdpu2_deinit()
584 wr_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu2_start()
594 rd_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu2_start()
643 param.regs = (RK_U32 *)p_hal->p_regs; in hal_avsd_vdpu2_wait()
645 if (!((AvsdVdpu2Regs_t *)p_hal->p_regs)->sw55.dec_rdy_sts) { in hal_avsd_vdpu2_wait()
652 … p_hal->p_regs[55], task->dec.flags.used_for_ref, task->dec.flags.ref_err, param.hard_err); in hal_avsd_vdpu2_wait()
656 memset(&p_hal->p_regs[55], 0, sizeof(RK_U32)); in hal_avsd_vdpu2_wait()