Lines Matching refs:p_hal
31 static MPP_RET set_defalut_parameters(AvsdHalCtx_t *p_hal) in set_defalut_parameters() argument
33 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in set_defalut_parameters()
70 static MPP_RET set_regs_parameters(AvsdHalCtx_t *p_hal, HalDecTask *task) in set_regs_parameters() argument
74 AvsdSyntax_t *p_syn = &p_hal->syn; in set_regs_parameters()
75 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in set_regs_parameters()
77 set_defalut_parameters(p_hal); in set_regs_parameters()
84 if (p_hal->work_out < 0) { in set_regs_parameters()
85 p_hal->work_out = get_queue_pic(p_hal); in set_regs_parameters()
86 if (p_hal->work_out < 0) { in set_regs_parameters()
93 AvsdHalPic_t *p_work_out = &p_hal->pic[p_hal->work_out]; in set_regs_parameters()
110 p_regs->sw57.pic_topfield_e = p_hal->first_field; in set_regs_parameters()
118 p_regs->sw122.strm_start_bit = 8 * (p_hal->data_offset & 0x7); in set_regs_parameters()
119 p_hal->data_offset = (p_hal->data_offset & ~0x7); in set_regs_parameters()
120 p_regs->sw64.rlc_vlc_st_adr = get_packet_fd(p_hal, task->input); in set_regs_parameters()
121 mpp_dev_set_reg_offset(p_hal->dev, 64, p_hal->data_offset); in set_regs_parameters()
122 p_regs->sw51.stream_len = p_syn->bitstream_size - p_hal->data_offset; in set_regs_parameters()
126 p_regs->sw63.dec_out_st_adr = get_frame_fd(p_hal, task->output); in set_regs_parameters()
127 if (p_syn->pp.pictureStructure == FIELDPICTURE && !p_hal->first_field) { in set_regs_parameters()
129 mpp_dev_set_reg_offset(p_hal->dev, 63, p_syn->pp.horizontalSize); in set_regs_parameters()
136 tmp_fwd = (p_hal->work1 < 0) ? p_hal->work0 : p_hal->work1; in set_regs_parameters()
137 tmp_fwd = (tmp_fwd < 0) ? p_hal->work_out : tmp_fwd; in set_regs_parameters()
141 if (!p_hal->first_field in set_regs_parameters()
144 p_regs->sw131.refer0_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
145 p_regs->sw148.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
146 p_regs->sw134.refer2_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
147 p_regs->sw135.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
149 p_regs->sw131.refer0_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
150 p_regs->sw148.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
151 p_regs->sw134.refer2_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
152 p_regs->sw135.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
160 if (p_hal->work0 >= 0) { in set_regs_parameters()
161 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
172 if (p_hal->work1 >= 0) { in set_regs_parameters()
174 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
182 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
183 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
184 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
191 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
198 if (p_hal->work0 >= 0) { in set_regs_parameters()
200 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
208 if (p_hal->work1 >= 0) { in set_regs_parameters()
210 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
214 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
231 if (p_hal->work0 >= 0) { in set_regs_parameters()
232 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
238 if (p_hal->first_field) { in set_regs_parameters()
250 if (p_hal->work1 >= 0) { in set_regs_parameters()
252 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
255 if (p_hal->first_field) { in set_regs_parameters()
267 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
268 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
269 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
273 if (p_syn->pp.pbFieldEnhancedFlag && !p_hal->first_field) { in set_regs_parameters()
279 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
284 if (p_hal->first_field) { in set_regs_parameters()
294 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
296 if (p_hal->first_field) { in set_regs_parameters()
305 if (p_hal->work0 >= 0) { in set_regs_parameters()
307 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
311 if (!p_hal->first_field) { in set_regs_parameters()
324 if (p_hal->work1 >= 0) { in set_regs_parameters()
326 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
330 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
331 if (p_hal->first_field) { in set_regs_parameters()
359 || (p_syn->pp.picCodingType == IFRAME && !p_hal->first_field)) { in set_regs_parameters()
366 p_regs->sw62.dmmv_st_adr = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
367 if (p_hal->first_field || in set_regs_parameters()
368 (p_syn->pp.picCodingType == BFRAME && p_hal->prev_pic_structure)) { in set_regs_parameters()
377 mpp_dev_set_reg_offset(p_hal->dev, 62, offset); in set_regs_parameters()
382 if (p_hal->work0 >= 0) { in set_regs_parameters()
383 pic_type = p_hal->pic[p_hal->work0].pic_type; in set_regs_parameters()
385 prev_anc_type = !pic_type || (!p_hal->first_field && !p_hal->prev_pic_structure); in set_regs_parameters()
391 if (!p_hal->prev_pic_structure) { in set_regs_parameters()
392 mpp_dev_set_reg_offset(p_hal->dev, 134, 2); in set_regs_parameters()
393 mpp_dev_set_reg_offset(p_hal->dev, 135, 3); in set_regs_parameters()
404 static MPP_RET update_parameters(AvsdHalCtx_t *p_hal) in update_parameters() argument
406 AvsdSyntax_t *p_syn = &p_hal->syn; in update_parameters()
408 if (p_syn->pp.pictureStructure == FRAMEPICTURE || !p_hal->first_field) { in update_parameters()
409 p_hal->first_field = 1; in update_parameters()
411 RK_S32 temp = p_hal->work1; in update_parameters()
413 p_hal->work1 = p_hal->work0; in update_parameters()
414 p_hal->work0 = p_hal->work_out; in update_parameters()
416 if (p_hal->work_out >= 0) in update_parameters()
417 p_hal->pic[p_hal->work_out].pic_type = p_syn->pp.picCodingType == IFRAME; in update_parameters()
418 p_hal->work_out = temp; in update_parameters()
419 p_hal->prev_pic_structure = p_syn->pp.pictureStructure; in update_parameters()
421 p_hal->prev_pic_code_type = p_syn->pp.picCodingType; in update_parameters()
423 p_hal->first_field = 0; in update_parameters()
429 static MPP_RET repeat_other_field(AvsdHalCtx_t *p_hal, HalTaskInfo *task) in repeat_other_field() argument
435 AvsdVdpu2Regs_t *p_regs = (AvsdVdpu2Regs_t *)p_hal->p_regs; in repeat_other_field()
438 p_hal->data_offset = p_regs->sw64.rlc_vlc_st_adr >> 10; in repeat_other_field()
439 p_hal->data_offset += p_hal->syn.bitstream_offset; in repeat_other_field()
440 p_hal->data_offset -= MPP_MIN(p_hal->data_offset, 8); in repeat_other_field()
442 mpp_buf_slot_get_prop(p_hal->packet_slots, task->dec.input, SLOT_BUFFER, &mbuffer); in repeat_other_field()
443 pdata = (RK_U8 *)mpp_buffer_get_ptr(mbuffer) + p_hal->data_offset; in repeat_other_field()
447 p_hal->data_offset += i; in repeat_other_field()
454 p_hal->frame_no, i, p_hal->data_offset); in repeat_other_field()
457 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in repeat_other_field()
458 hal_avsd_vdpu2_start((void *)p_hal, task); in repeat_other_field()
459 hal_avsd_vdpu2_wait((void *)p_hal, task); in repeat_other_field()
478 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_init() local
483 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, &p_hal->mv_buf, buf_size)); in hal_avsd_vdpu2_init()
485 p_hal->p_regs = mpp_calloc_size(RK_U32, sizeof(AvsdVdpu2Regs_t)); in hal_avsd_vdpu2_init()
486 MEM_CHECK(ret, p_hal->p_regs); in hal_avsd_vdpu2_init()
488 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_vdpu2_init()
489 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_vdpu2_init()
490 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_vdpu2_init()
492 p_hal->regs_num = 159; in hal_avsd_vdpu2_init()
494 p_hal->first_field = 1; in hal_avsd_vdpu2_init()
495 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_vdpu2_init()
497 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_vdpu2_init()
498 p_hal->work_out = -1; in hal_avsd_vdpu2_init()
499 p_hal->work0 = -1; in hal_avsd_vdpu2_init()
500 p_hal->work1 = -1; in hal_avsd_vdpu2_init()
518 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_deinit() local
522 if (p_hal->mv_buf) { in hal_avsd_vdpu2_deinit()
523 mpp_buffer_put(p_hal->mv_buf); in hal_avsd_vdpu2_deinit()
524 p_hal->mv_buf = NULL; in hal_avsd_vdpu2_deinit()
526 MPP_FREE(p_hal->p_regs); in hal_avsd_vdpu2_deinit()
542 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_gen_regs() local
546 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu2_gen_regs()
549 p_hal->data_offset = p_hal->syn.bitstream_offset; in hal_avsd_vdpu2_gen_regs()
551 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in hal_avsd_vdpu2_gen_regs()
570 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_start() local
575 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu2_start()
584 wr_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu2_start()
588 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avsd_vdpu2_start()
594 rd_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu2_start()
598 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_RD, &rd_cfg); in hal_avsd_vdpu2_start()
604 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_SEND, NULL); in hal_avsd_vdpu2_start()
625 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_wait() local
630 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu2_wait()
634 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL); in hal_avsd_vdpu2_wait()
639 if (p_hal->dec_cb) { in hal_avsd_vdpu2_wait()
643 param.regs = (RK_U32 *)p_hal->p_regs; in hal_avsd_vdpu2_wait()
645 if (!((AvsdVdpu2Regs_t *)p_hal->p_regs)->sw55.dec_rdy_sts) { in hal_avsd_vdpu2_wait()
650 mpp_callback(p_hal->dec_cb, ¶m); in hal_avsd_vdpu2_wait()
652 … p_hal->p_regs[55], task->dec.flags.used_for_ref, task->dec.flags.ref_err, param.hard_err); in hal_avsd_vdpu2_wait()
655 update_parameters(p_hal); in hal_avsd_vdpu2_wait()
656 memset(&p_hal->p_regs[55], 0, sizeof(RK_U32)); in hal_avsd_vdpu2_wait()
657 if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE && in hal_avsd_vdpu2_wait()
659 p_hal->dec_cfg->base.disable_error)) { in hal_avsd_vdpu2_wait()
660 repeat_other_field(p_hal, task); in hal_avsd_vdpu2_wait()
662 p_hal->frame_no++; in hal_avsd_vdpu2_wait()
677 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu2_reset() local
681 p_hal->first_field = 1; in hal_avsd_vdpu2_reset()
682 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_vdpu2_reset()
684 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_vdpu2_reset()
685 p_hal->work_out = -1; in hal_avsd_vdpu2_reset()
686 p_hal->work0 = -1; in hal_avsd_vdpu2_reset()
687 p_hal->work1 = -1; in hal_avsd_vdpu2_reset()