Lines Matching refs:p_hal
31 static MPP_RET set_defalut_parameters(AvsdHalCtx_t *p_hal) in set_defalut_parameters() argument
33 AvsdVdpu1Regs_t *p_regs = (AvsdVdpu1Regs_t *)p_hal->p_regs; in set_defalut_parameters()
71 static MPP_RET set_regs_parameters(AvsdHalCtx_t *p_hal, HalDecTask *task) in set_regs_parameters() argument
75 AvsdSyntax_t *p_syn = &p_hal->syn; in set_regs_parameters()
76 AvsdVdpu1Regs_t *p_regs = (AvsdVdpu1Regs_t *)p_hal->p_regs; in set_regs_parameters()
78 set_defalut_parameters(p_hal); in set_regs_parameters()
86 if (p_hal->work_out < 0) { in set_regs_parameters()
87 p_hal->work_out = get_queue_pic(p_hal); in set_regs_parameters()
88 if (p_hal->work_out < 0) { in set_regs_parameters()
95 AvsdHalPic_t *p_work_out = &p_hal->pic[p_hal->work_out]; in set_regs_parameters()
112 p_regs->sw03.pic_topfiled_e = p_hal->first_field; in set_regs_parameters()
125 mpp_log("data_offset %x\n", p_hal->data_offset); in set_regs_parameters()
126 p_regs->sw05.strm_start_bit = 8 * (p_hal->data_offset & 0x7); in set_regs_parameters()
127 p_hal->data_offset = (p_hal->data_offset & ~0x7); in set_regs_parameters()
128 p_regs->sw12.rlc_vlc_base = get_packet_fd(p_hal, task->input); in set_regs_parameters()
129 mpp_dev_set_reg_offset(p_hal->dev, 12, p_hal->data_offset); in set_regs_parameters()
130 p_regs->sw06.stream_len = p_syn->bitstream_size - p_hal->data_offset; in set_regs_parameters()
134 p_regs->sw13.dec_out_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
135 if (p_syn->pp.pictureStructure == FIELDPICTURE && !p_hal->first_field) { in set_regs_parameters()
137 mpp_dev_set_reg_offset(p_hal->dev, 13, p_syn->pp.horizontalSize); in set_regs_parameters()
144 tmp_fwd = (p_hal->work1 < 0) ? p_hal->work0 : p_hal->work1; in set_regs_parameters()
145 tmp_fwd = (tmp_fwd < 0) ? p_hal->work_out : tmp_fwd; in set_regs_parameters()
149 if (!p_hal->first_field in set_regs_parameters()
152 p_regs->sw14.refer0_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
153 p_regs->sw15.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
154 p_regs->sw16.refer2_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
155 p_regs->sw17.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
157 p_regs->sw14.refer0_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
158 p_regs->sw15.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
159 p_regs->sw16.refer2_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
160 p_regs->sw17.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
168 if (p_hal->work0 >= 0) { in set_regs_parameters()
169 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
180 if (p_hal->work1 >= 0) { in set_regs_parameters()
182 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
190 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
191 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
192 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
199 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
206 if (p_hal->work0 >= 0) { in set_regs_parameters()
208 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
216 if (p_hal->work1 >= 0) { in set_regs_parameters()
218 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
222 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
239 if (p_hal->work0 >= 0) { in set_regs_parameters()
240 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
246 if (p_hal->first_field) { in set_regs_parameters()
258 if (p_hal->work1 >= 0) { in set_regs_parameters()
260 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
263 if (p_hal->first_field) { in set_regs_parameters()
275 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
276 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
277 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
281 if (p_syn->pp.pbFieldEnhancedFlag && !p_hal->first_field) { in set_regs_parameters()
287 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
292 if (p_hal->first_field) { in set_regs_parameters()
302 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
304 if (p_hal->first_field) { in set_regs_parameters()
313 if (p_hal->work0 >= 0) { in set_regs_parameters()
315 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
319 if (!p_hal->first_field) { in set_regs_parameters()
332 if (p_hal->work1 >= 0) { in set_regs_parameters()
334 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
338 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
339 if (p_hal->first_field) { in set_regs_parameters()
367 || (p_syn->pp.picCodingType == IFRAME && !p_hal->first_field)) { in set_regs_parameters()
373 p_regs->sw41.dir_mv_base = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
374 if (p_hal->first_field || in set_regs_parameters()
375 (p_syn->pp.picCodingType == BFRAME && p_hal->prev_pic_structure)) { in set_regs_parameters()
384 mpp_dev_set_reg_offset(p_hal->dev, 41, offset); in set_regs_parameters()
389 if (p_hal->work0 >= 0) { in set_regs_parameters()
390 pic_type = p_hal->pic[p_hal->work0].pic_type; in set_regs_parameters()
392 prev_anc_type = !pic_type || (!p_hal->first_field && !p_hal->prev_pic_structure); in set_regs_parameters()
398 if (!p_hal->prev_pic_structure) { in set_regs_parameters()
399 mpp_dev_set_reg_offset(p_hal->dev, 16, 2); in set_regs_parameters()
400 mpp_dev_set_reg_offset(p_hal->dev, 17, 3); in set_regs_parameters()
411 static MPP_RET update_parameters(AvsdHalCtx_t *p_hal) in update_parameters() argument
413 AvsdSyntax_t *p_syn = &p_hal->syn; in update_parameters()
415 if (p_syn->pp.pictureStructure == FRAMEPICTURE || !p_hal->first_field) { in update_parameters()
416 p_hal->first_field = 1; in update_parameters()
418 RK_S32 temp = p_hal->work1; in update_parameters()
420 p_hal->work1 = p_hal->work0; in update_parameters()
421 p_hal->work0 = p_hal->work_out; in update_parameters()
423 if (p_hal->work_out >= 0) in update_parameters()
424 p_hal->pic[p_hal->work_out].pic_type = p_syn->pp.picCodingType == IFRAME; in update_parameters()
425 p_hal->work_out = temp; in update_parameters()
426 p_hal->prev_pic_structure = p_syn->pp.pictureStructure; in update_parameters()
428 p_hal->prev_pic_code_type = p_syn->pp.picCodingType; in update_parameters()
430 p_hal->first_field = 0; in update_parameters()
436 static MPP_RET repeat_other_field(AvsdHalCtx_t *p_hal, HalTaskInfo *task) in repeat_other_field() argument
442 AvsdVdpu1Regs_t *p_regs = (AvsdVdpu1Regs_t *)p_hal->p_regs; in repeat_other_field()
445 p_hal->data_offset = p_regs->sw12.rlc_vlc_base >> 10; in repeat_other_field()
446 p_hal->data_offset += p_hal->syn.bitstream_offset; in repeat_other_field()
447 p_hal->data_offset -= MPP_MIN(p_hal->data_offset, 8); in repeat_other_field()
449 mpp_buf_slot_get_prop(p_hal->packet_slots, task->dec.input, SLOT_BUFFER, &mbuffer); in repeat_other_field()
450 pdata = (RK_U8 *)mpp_buffer_get_ptr(mbuffer) + p_hal->data_offset; in repeat_other_field()
454 p_hal->data_offset += i; in repeat_other_field()
460 p_hal->frame_no, i, p_hal->data_offset); in repeat_other_field()
462 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in repeat_other_field()
463 hal_avsd_vdpu1_start((void *)p_hal, task); in repeat_other_field()
464 hal_avsd_vdpu1_wait((void *)p_hal, task); in repeat_other_field()
482 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_init() local
487 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, &p_hal->mv_buf, buf_size)); in hal_avsd_vdpu1_init()
489 p_hal->p_regs = mpp_calloc_size(RK_U32, sizeof(AvsdVdpu1Regs_t)); in hal_avsd_vdpu1_init()
490 MEM_CHECK(ret, p_hal->p_regs); in hal_avsd_vdpu1_init()
492 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_vdpu1_init()
493 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_vdpu1_init()
494 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_vdpu1_init()
496 p_hal->regs_num = 60; in hal_avsd_vdpu1_init()
498 p_hal->first_field = 1; in hal_avsd_vdpu1_init()
499 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_vdpu1_init()
501 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_vdpu1_init()
502 p_hal->work_out = -1; in hal_avsd_vdpu1_init()
503 p_hal->work0 = -1; in hal_avsd_vdpu1_init()
504 p_hal->work1 = -1; in hal_avsd_vdpu1_init()
521 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_deinit() local
525 if (p_hal->mv_buf) { in hal_avsd_vdpu1_deinit()
526 mpp_buffer_put(p_hal->mv_buf); in hal_avsd_vdpu1_deinit()
527 p_hal->mv_buf = NULL; in hal_avsd_vdpu1_deinit()
529 MPP_FREE(p_hal->p_regs); in hal_avsd_vdpu1_deinit()
545 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_gen_regs() local
549 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu1_gen_regs()
552 p_hal->data_offset = p_hal->syn.bitstream_offset; in hal_avsd_vdpu1_gen_regs()
554 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in hal_avsd_vdpu1_gen_regs()
572 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_start() local
577 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu1_start()
586 wr_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu1_start()
590 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avsd_vdpu1_start()
596 rd_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu1_start()
600 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_RD, &rd_cfg); in hal_avsd_vdpu1_start()
606 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_SEND, NULL); in hal_avsd_vdpu1_start()
627 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_wait() local
632 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_vdpu1_wait()
636 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL); in hal_avsd_vdpu1_wait()
641 if (p_hal->dec_cb) { in hal_avsd_vdpu1_wait()
645 param.regs = (RK_U32 *)p_hal->p_regs; in hal_avsd_vdpu1_wait()
647 if (!((AvsdVdpu1Regs_t *)p_hal->p_regs)->sw01.dec_rdy_int) { in hal_avsd_vdpu1_wait()
652 mpp_callback(p_hal->dec_cb, ¶m); in hal_avsd_vdpu1_wait()
654 … p_hal->p_regs[1], task->dec.flags.used_for_ref, task->dec.flags.ref_err, param.hard_err); in hal_avsd_vdpu1_wait()
656 update_parameters(p_hal); in hal_avsd_vdpu1_wait()
657 memset(&p_hal->p_regs[1], 0, sizeof(RK_U32)); in hal_avsd_vdpu1_wait()
658 if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE && in hal_avsd_vdpu1_wait()
660 p_hal->dec_cfg->base.disable_error)) { in hal_avsd_vdpu1_wait()
661 repeat_other_field(p_hal, task); in hal_avsd_vdpu1_wait()
663 p_hal->frame_no++; in hal_avsd_vdpu1_wait()
678 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_vdpu1_reset() local
682 p_hal->first_field = 1; in hal_avsd_vdpu1_reset()
683 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_vdpu1_reset()
685 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_vdpu1_reset()
686 p_hal->work_out = -1; in hal_avsd_vdpu1_reset()
687 p_hal->work0 = -1; in hal_avsd_vdpu1_reset()
688 p_hal->work1 = -1; in hal_avsd_vdpu1_reset()