Lines Matching refs:p_hal
39 MPP_RET set_defalut_parameters(AvsdHalCtx_t *p_hal) in set_defalut_parameters() argument
41 AvsdPlusRegs_t *p_regs = (AvsdPlusRegs_t *)p_hal->p_regs; in set_defalut_parameters()
79 static MPP_RET set_regs_parameters(AvsdHalCtx_t *p_hal, HalDecTask *task) in set_regs_parameters() argument
83 AvsdSyntax_t *p_syn = &p_hal->syn; in set_regs_parameters()
84 AvsdPlusRegs_t *p_regs = (AvsdPlusRegs_t *)p_hal->p_regs; in set_regs_parameters()
89 if (p_hal->work_out < 0) { in set_regs_parameters()
90 p_hal->work_out = get_queue_pic(p_hal); in set_regs_parameters()
91 if (p_hal->work_out < 0) { in set_regs_parameters()
98 AvsdHalPic_t *p_work_out = &p_hal->pic[p_hal->work_out]; in set_regs_parameters()
105 set_defalut_parameters(p_hal); in set_regs_parameters()
117 p_regs->sw03.pic_topfiled_e = p_hal->first_field; in set_regs_parameters()
119 p_regs->sw03.pic_topfiled_e = !p_hal->first_field; in set_regs_parameters()
133 p_regs->sw05.strm_start_bit = 8 * (p_hal->data_offset & 0x7); in set_regs_parameters()
134 p_hal->data_offset = (p_hal->data_offset & ~0x7); in set_regs_parameters()
135 p_regs->sw12.rlc_vlc_base = get_packet_fd(p_hal, task->input); in set_regs_parameters()
136 mpp_dev_set_reg_offset(p_hal->dev, 12, p_hal->data_offset); in set_regs_parameters()
137 p_regs->sw06.stream_len = p_syn->bitstream_size - p_hal->data_offset; in set_regs_parameters()
172 if (p_syn->pp.pictureStructure == FRAMEPICTURE || p_hal->first_field) { in set_regs_parameters()
173 p_regs->sw13.dec_out_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
178 p_regs->sw13.dec_out_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
179 mpp_dev_set_reg_offset(p_hal->dev, 13, stride); in set_regs_parameters()
186 tmp_fwd = (p_hal->work1 < 0) ? p_hal->work0 : p_hal->work1; in set_regs_parameters()
187 tmp_fwd = (tmp_fwd < 0) ? p_hal->work_out : tmp_fwd; in set_regs_parameters()
191 if (!p_hal->first_field in set_regs_parameters()
194 p_regs->sw14.refer0_base = get_frame_fd(p_hal, task->output); in set_regs_parameters()
195 p_regs->sw15.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
196 p_regs->sw16.refer2_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
197 p_regs->sw17.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
199 p_regs->sw14.refer0_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
200 p_regs->sw15.refer1_base = get_frame_fd(p_hal, refer0); in set_regs_parameters()
201 p_regs->sw16.refer2_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
202 p_regs->sw17.refer3_base = get_frame_fd(p_hal, refer1); in set_regs_parameters()
210 if (p_hal->work0 >= 0) { in set_regs_parameters()
211 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
222 if (p_hal->work1 >= 0) { in set_regs_parameters()
224 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
232 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
233 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
234 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
241 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
248 if (p_hal->work0 >= 0) { in set_regs_parameters()
250 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
258 if (p_hal->work1 >= 0) { in set_regs_parameters()
260 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
264 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
281 if (p_hal->work0 >= 0) { in set_regs_parameters()
282 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
288 if (p_hal->first_field) { in set_regs_parameters()
300 if (p_hal->work1 >= 0) { in set_regs_parameters()
302 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
305 if (p_hal->first_field) { in set_regs_parameters()
317 if (p_hal->work0 >= 0 && p_hal->work1 >= 0) { in set_regs_parameters()
318 tmp = (2 * p_hal->pic[p_hal->work0].picture_distance - in set_regs_parameters()
319 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
323 if (p_syn->pp.pbFieldEnhancedFlag && !p_hal->first_field) { in set_regs_parameters()
329 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
334 if (p_hal->first_field) { in set_regs_parameters()
344 tmp = p_hal->future2prev_past_dist; in set_regs_parameters()
346 if (p_hal->first_field) { in set_regs_parameters()
355 if (p_hal->work0 >= 0) { in set_regs_parameters()
357 2 * p_hal->pic[p_hal->work0].picture_distance - 512) & 0x1FF; in set_regs_parameters()
361 if (!p_hal->first_field) { in set_regs_parameters()
374 if (p_hal->work1 >= 0) { in set_regs_parameters()
376 2 * p_hal->pic[p_hal->work1].picture_distance - 512) & 0x1FF; in set_regs_parameters()
380 p_hal->future2prev_past_dist = tmp; in set_regs_parameters()
381 if (p_hal->first_field) { in set_regs_parameters()
416 if (p_hal->first_field) { in set_regs_parameters()
453 || (p_syn->pp.picCodingType == IFRAME && !p_hal->first_field)) { in set_regs_parameters()
459 if (p_hal->first_field || in set_regs_parameters()
460 (p_syn->pp.picCodingType == BFRAME && p_hal->prev_pic_structure)) { in set_regs_parameters()
461 p_regs->sw41.dir_mv_base = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
470 p_regs->sw41.dir_mv_base = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
471 mpp_dev_set_reg_offset(p_hal->dev, 41, offset); in set_regs_parameters()
475 p_regs->sw45.dir_mv_base2 = mpp_buffer_get_fd(p_hal->mv_buf); in set_regs_parameters()
482 if (p_hal->work0 >= 0) { in set_regs_parameters()
483 pic_type = p_hal->pic[p_hal->work0].pic_type; in set_regs_parameters()
485 prev_anc_type = !pic_type || (!p_hal->first_field && !p_hal->prev_pic_structure); in set_regs_parameters()
491 if (!p_hal->prev_pic_structure) { in set_regs_parameters()
492 mpp_dev_set_reg_offset(p_hal->dev, 16, 2); in set_regs_parameters()
493 mpp_dev_set_reg_offset(p_hal->dev, 17, 3); in set_regs_parameters()
504 static MPP_RET update_parameters(AvsdHalCtx_t *p_hal) in update_parameters() argument
506 AvsdSyntax_t *p_syn = &p_hal->syn; in update_parameters()
508 if (p_syn->pp.pictureStructure == FRAMEPICTURE || !p_hal->first_field) { in update_parameters()
509 p_hal->first_field = 1; in update_parameters()
511 RK_S32 temp = p_hal->work1; in update_parameters()
513 p_hal->work1 = p_hal->work0; in update_parameters()
514 p_hal->work0 = p_hal->work_out; in update_parameters()
516 if (p_hal->work_out >= 0) in update_parameters()
517 p_hal->pic[p_hal->work_out].pic_type = p_syn->pp.picCodingType == IFRAME; in update_parameters()
518 p_hal->work_out = temp; in update_parameters()
519 p_hal->prev_pic_structure = p_syn->pp.pictureStructure; in update_parameters()
521 p_hal->prev_pic_code_type = p_syn->pp.picCodingType; in update_parameters()
523 p_hal->first_field = 0; in update_parameters()
529 static MPP_RET repeat_other_field(AvsdHalCtx_t *p_hal, HalTaskInfo *task) in repeat_other_field() argument
535 AvsdPlusRegs_t *p_regs = (AvsdPlusRegs_t *)p_hal->p_regs; in repeat_other_field()
540 p_hal->data_offset = p_regs->sw12.rlc_vlc_base >> 10; in repeat_other_field()
541 p_hal->data_offset += p_hal->syn.bitstream_offset; in repeat_other_field()
542 p_hal->data_offset -= MPP_MIN(p_hal->data_offset, 8); in repeat_other_field()
544 mpp_buf_slot_get_prop(p_hal->packet_slots, task->dec.input, SLOT_BUFFER, &mbuffer); in repeat_other_field()
545 pdata = (RK_U8 *)mpp_buffer_get_ptr(mbuffer) + p_hal->data_offset; in repeat_other_field()
546 stream_remain = p_hal->syn.bitstream_size - p_hal->data_offset; in repeat_other_field()
549 p_hal->frame_no, p_hal->syn.pp.pictureDistance, p_hal->syn.bitstream_size, in repeat_other_field()
550 p_hal->data_offset, stream_remain); in repeat_other_field()
561 p_hal->data_offset = p_hal->syn.bitstream_size - stream_remain - 3; in repeat_other_field()
569 p_hal->frame_no, i, p_hal->data_offset); in repeat_other_field()
571 p_hal->frame_no++; in repeat_other_field()
572 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in repeat_other_field()
573 hal_avsd_plus_start((void *)p_hal, task); in repeat_other_field()
574 hal_avsd_plus_wait((void *)p_hal, task); in repeat_other_field()
592 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_init() local
597 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, &p_hal->mv_buf, buf_size)); in hal_avsd_plus_init()
599 p_hal->p_regs = mpp_calloc_size(RK_U32, sizeof(AvsdPlusRegs_t)); in hal_avsd_plus_init()
600 MEM_CHECK(ret, p_hal->p_regs); in hal_avsd_plus_init()
602 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_plus_init()
603 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_plus_init()
604 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_plus_init()
606 p_hal->regs_num = 60; in hal_avsd_plus_init()
608 p_hal->first_field = 1; in hal_avsd_plus_init()
609 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_plus_init()
611 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_plus_init()
612 p_hal->work_out = -1; in hal_avsd_plus_init()
613 p_hal->work0 = -1; in hal_avsd_plus_init()
614 p_hal->work1 = -1; in hal_avsd_plus_init()
615 p_hal->cfg = cfg; in hal_avsd_plus_init()
631 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_deinit() local
634 if (p_hal->mv_buf) { in hal_avsd_plus_deinit()
635 mpp_buffer_put(p_hal->mv_buf); in hal_avsd_plus_deinit()
636 p_hal->mv_buf = NULL; in hal_avsd_plus_deinit()
638 MPP_FREE(p_hal->p_regs); in hal_avsd_plus_deinit()
653 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_gen_regs() local
657 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_plus_gen_regs()
660 p_hal->data_offset = p_hal->syn.bitstream_offset; in hal_avsd_plus_gen_regs()
662 FUN_CHECK(ret = set_regs_parameters(p_hal, &task->dec)); in hal_avsd_plus_gen_regs()
679 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_start() local
685 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_plus_start()
693 wr_cfg.reg = p_hal->p_regs; in hal_avsd_plus_start()
709 fprintf(fp, "reg[%03d]: %08x\n", i, p_hal->p_regs[i]); in hal_avsd_plus_start()
717 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avsd_plus_start()
723 rd_cfg.reg = p_hal->p_regs; in hal_avsd_plus_start()
727 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_RD, &rd_cfg); in hal_avsd_plus_start()
733 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_SEND, NULL); in hal_avsd_plus_start()
755 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_wait() local
761 !p_hal->dec_cfg->base.disable_error) { in hal_avsd_plus_wait()
765 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL); in hal_avsd_plus_wait()
770 if (p_hal->dec_cb) { in hal_avsd_plus_wait()
774 param.regs = (RK_U32 *)p_hal->p_regs; in hal_avsd_plus_wait()
775 param.hard_err = (!((AvsdPlusRegs_t *)p_hal->p_regs)->sw01.dec_rdy_int) || in hal_avsd_plus_wait()
776 ((AvsdPlusRegs_t *)p_hal->p_regs)->sw01.dec_error_int; in hal_avsd_plus_wait()
778 mpp_callback(p_hal->dec_cb, ¶m); in hal_avsd_plus_wait()
782 … p_hal->first_field, p_hal->p_regs[1], task->dec.flags.parse_err, task->dec.flags.ref_err); in hal_avsd_plus_wait()
784 update_parameters(p_hal); in hal_avsd_plus_wait()
785 if (!p_hal->first_field && p_hal->syn.pp.pictureStructure == FIELDPICTURE && in hal_avsd_plus_wait()
787 p_hal->dec_cfg->base.disable_error)) { in hal_avsd_plus_wait()
788 if (((AvsdPlusRegs_t *)p_hal->p_regs)->sw01.dec_rdy_int && in hal_avsd_plus_wait()
789 !((AvsdPlusRegs_t *)p_hal->p_regs)->sw01.dec_error_int) { in hal_avsd_plus_wait()
790 memset(&p_hal->p_regs[1], 0, sizeof(RK_U32)); in hal_avsd_plus_wait()
791 repeat_other_field(p_hal, task); in hal_avsd_plus_wait()
796 memset(&p_hal->p_regs[1], 0, sizeof(RK_U32)); in hal_avsd_plus_wait()
813 AvsdHalCtx_t *p_hal = (AvsdHalCtx_t *)decoder; in hal_avsd_plus_reset() local
817 p_hal->first_field = 1; in hal_avsd_plus_reset()
818 p_hal->prev_pic_structure = 0; //!< field in hal_avsd_plus_reset()
820 memset(p_hal->pic, 0, sizeof(p_hal->pic)); in hal_avsd_plus_reset()
821 p_hal->work_out = -1; in hal_avsd_plus_reset()
822 p_hal->work0 = -1; in hal_avsd_plus_reset()
823 p_hal->work1 = -1; in hal_avsd_plus_reset()