Lines Matching refs:regs
48 Vdpu383Avs2dRegSet *regs; member
57 Vdpu383Avs2dRegSet *regs; member
236 static void init_ctrl_regs(Vdpu383Avs2dRegSet *regs) in init_ctrl_regs() argument
238 Vdpu383CtrlReg *ctrl_regs = ®s->ctrl_regs; in init_ctrl_regs()
320 static void hal_avs2d_rcb_info_update(void *hal, Vdpu383Avs2dRegSet *regs) in hal_avs2d_rcb_info_update() argument
330 (void) regs; in hal_avs2d_rcb_info_update()
351 static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, HalTaskInfo *task) in fill_registers() argument
386 regs->ctrl_regs.reg9.fbc_e = 1; in fill_registers()
387 regs->avs2d_paras.reg68_hor_virstride = fbc_hdr_stride / 64; in fill_registers()
388 fbd_offset = regs->avs2d_paras.reg68_hor_virstride * MPP_ALIGN(ver_virstride, 64) * 4; in fill_registers()
389 regs->avs2d_addrs.reg193_fbc_payload_offset = fbd_offset; in fill_registers()
391 regs->ctrl_regs.reg9.tile_e = 1; in fill_registers()
392 regs->avs2d_paras.reg68_hor_virstride = hor_virstride * 6 / 16; in fill_registers()
393 regs->avs2d_paras.reg70_y_virstride = (y_virstride + uv_virstride) / 16; in fill_registers()
395 regs->ctrl_regs.reg9.fbc_e = 0; in fill_registers()
396 regs->ctrl_regs.reg9.tile_e = 0; in fill_registers()
397 regs->avs2d_paras.reg68_hor_virstride = hor_virstride / 16; in fill_registers()
398 regs->avs2d_paras.reg69_raster_uv_hor_virstride = hor_virstride / 16; in fill_registers()
399 regs->avs2d_paras.reg70_y_virstride = y_virstride / 16; in fill_registers()
409 regs->avs2d_addrs.reg168_decout_base = fd; in fill_registers()
410 regs->avs2d_addrs.reg192_payload_st_cur_base = fd; in fill_registers()
412 regs->avs2d_addrs.reg216_colmv_cur_base = mpp_buffer_get_fd(mv_buf->buf[0]); in fill_registers()
413 …AVS2D_HAL_TRACE("cur frame index %d, fd %d, colmv fd %d", task_dec->output, fd, regs->avs2d_addrs.… in fill_registers()
448 regs->avs2d_addrs.reg170_185_ref_base[i] = get_frame_fd(p_hal, slot_idx); in fill_registers()
449 … regs->avs2d_addrs.reg195_210_payload_st_ref_base[i] = get_frame_fd(p_hal, slot_idx); in fill_registers()
451 … regs->avs2d_addrs.reg217_232_colmv_ref_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]); in fill_registers()
464 regs->avs2d_addrs.reg170_185_ref_base[replace_idx] = get_frame_fd(p_hal, slot_idx); in fill_registers()
465 …regs->avs2d_addrs.reg195_210_payload_st_ref_base[replace_idx] = regs->avs2d_addrs.reg170_185_ref_b… in fill_registers()
467 … regs->avs2d_addrs.reg217_232_colmv_ref_base[replace_idx] = mpp_buffer_get_fd(mv_buf->buf[0]); in fill_registers()
471 regs->avs2d_addrs.reg169_error_ref_base = regs->avs2d_addrs.reg170_185_ref_base[0]; in fill_registers()
472 …regs->avs2d_addrs.reg194_payload_st_error_ref_base = regs->avs2d_addrs.reg195_210_payload_st_ref_b… in fill_registers()
476 regs->common_addr.reg128_strm_base = get_packet_fd(p_hal, task_dec->input); in fill_registers()
477 … AVS2D_HAL_TRACE("packet fd %d from slot %d", regs->common_addr.reg128_strm_base, task_dec->input); in fill_registers()
479 …regs->avs2d_paras.reg66_stream_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) … in fill_registers()
486 regs->common_addr.reg133_scale_down_base = regs->avs2d_addrs.reg168_decout_base; in fill_registers()
487 vdpu383_setup_down_scale(mframe, p_hal->dev, ®s->ctrl_regs, in fill_registers()
488 (void *)®s->avs2d_paras); in fill_registers()
490 regs->ctrl_regs.reg9.scale_down_en = 0; in fill_registers()
516 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_deinit()
558 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu383Avs2dRegSet, 1); in hal_avs2d_vdpu383_init()
559 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_init()
565 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_avs2d_vdpu383_init()
636 Vdpu383Avs2dRegSet *regs = NULL; in hal_avs2d_vdpu383_gen_regs() local
659 regs = reg_ctx->reg_buf[i].regs; in hal_avs2d_vdpu383_gen_regs()
662 reg_ctx->regs = reg_ctx->reg_buf[i].regs; in hal_avs2d_vdpu383_gen_regs()
668 mpp_assert(regs); in hal_avs2d_vdpu383_gen_regs()
671 regs = reg_ctx->regs; in hal_avs2d_vdpu383_gen_regs()
676 ret = fill_registers(p_hal, regs, task); in hal_avs2d_vdpu383_gen_regs()
685 regs->common_addr.reg131_gbl_base = reg_ctx->bufs_fd; in hal_avs2d_vdpu383_gen_regs()
687 regs->avs2d_paras.reg67_global_len = AVS2_383_SHPH_SIZE; in hal_avs2d_vdpu383_gen_regs()
689 regs->common_addr.reg132_scanlist_addr = reg_ctx->bufs_fd; in hal_avs2d_vdpu383_gen_regs()
695 hal_avs2d_rcb_info_update(p_hal, regs); in hal_avs2d_vdpu383_gen_regs()
696 vdpu383_setup_rcb(®s->common_addr, p_hal->dev, p_hal->fast_mode ? in hal_avs2d_vdpu383_gen_regs()
702 vdpu383_setup_statistic(®s->ctrl_regs); in hal_avs2d_vdpu383_gen_regs()
713 Vdpu383Avs2dRegSet *regs = NULL; in hal_avs2d_vdpu383_start() local
727 regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs; in hal_avs2d_vdpu383_start()
736 wr_cfg.reg = ®s->ctrl_regs; in hal_avs2d_vdpu383_start()
737 wr_cfg.size = sizeof(regs->ctrl_regs); in hal_avs2d_vdpu383_start()
745 wr_cfg.reg = ®s->common_addr; in hal_avs2d_vdpu383_start()
746 wr_cfg.size = sizeof(regs->common_addr); in hal_avs2d_vdpu383_start()
754 wr_cfg.reg = ®s->avs2d_paras; in hal_avs2d_vdpu383_start()
755 wr_cfg.size = sizeof(regs->avs2d_paras); in hal_avs2d_vdpu383_start()
763 wr_cfg.reg = ®s->avs2d_addrs; in hal_avs2d_vdpu383_start()
764 wr_cfg.size = sizeof(regs->avs2d_addrs); in hal_avs2d_vdpu383_start()
772 rd_cfg.reg = ®s->ctrl_regs.reg15; in hal_avs2d_vdpu383_start()
773 rd_cfg.size = sizeof(regs->ctrl_regs.reg15); in hal_avs2d_vdpu383_start()
889 Vdpu383Avs2dRegSet *regs; in hal_avs2d_vdpu383_wait() local
893 regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs; in hal_avs2d_vdpu383_wait()
909 AVS2D_HAL_TRACE("read irq_status 0x%08x\n", regs->ctrl_regs.reg19); in hal_avs2d_vdpu383_wait()
915 param.regs = (RK_U32 *)regs; in hal_avs2d_vdpu383_wait()
917 if ((!regs->ctrl_regs.reg15.rkvdec_frame_rdy_sta) || in hal_avs2d_vdpu383_wait()
918 regs->ctrl_regs.reg15.rkvdec_strm_error_sta || in hal_avs2d_vdpu383_wait()
919 regs->ctrl_regs.reg15.rkvdec_core_timeout_sta || in hal_avs2d_vdpu383_wait()
920 regs->ctrl_regs.reg15.rkvdec_ip_timeout_sta || in hal_avs2d_vdpu383_wait()
921 regs->ctrl_regs.reg15.rkvdec_bus_error_sta || in hal_avs2d_vdpu383_wait()
922 regs->ctrl_regs.reg15.rkvdec_buffer_empty_sta || in hal_avs2d_vdpu383_wait()
923 regs->ctrl_regs.reg15.rkvdec_colmv_ref_error_sta) in hal_avs2d_vdpu383_wait()
935 memset(®s->ctrl_regs.reg19, 0, sizeof(RK_U32)); in hal_avs2d_vdpu383_wait()