rkdec/av1d/hal_av1d_vdpu383.c

1267 static MPP_RET vdpu383_setup_scale_origin_bufs(Av1dHalCtx *p_hal, MppFrame mframe)  in vdpu383_setup_scale_origin_bufs()  argument
1269     Vdpu383Av1dRegCtx *ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_setup_scale_origin_bufs()
1297     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in hal_av1d_alloc_res()  local
1298     RK_U32 max_cnt = p_hal->fast_mode ? VDPU_FAST_REG_SET_CNT : 1;  in hal_av1d_alloc_res()
1301     INP_CHECK(ret, NULL == p_hal);  in hal_av1d_alloc_res()
1303     MEM_CHECK(ret, p_hal->reg_ctx = mpp_calloc_size(void, sizeof(Vdpu383Av1dRegCtx)));  in hal_av1d_alloc_res()
1304     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in hal_av1d_alloc_res()
1307 …BUF_CHECK(ret, mpp_buffer_get(p_hal->buf_group, &reg_ctx->bufs, MPP_ALIGN(VDPU383_INFO_BUF_SIZE(ma…  in hal_av1d_alloc_res()
1308     mpp_buffer_attach_dev(reg_ctx->bufs, p_hal->dev);  in hal_av1d_alloc_res()
1319     if (!p_hal->fast_mode) {  in hal_av1d_alloc_res()
1324 …BUF_CHECK(ret, mpp_buffer_get(p_hal->buf_group, &reg_ctx->cdf_rd_def_base, 200 * MPP_ALIGN(sizeof(…  in hal_av1d_alloc_res()
1325     mpp_buffer_attach_dev(reg_ctx->cdf_rd_def_base, p_hal->dev);  in hal_av1d_alloc_res()
1343     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in hal_av1d_release_res()  local
1344     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in hal_av1d_release_res()
1346     RK_U32 max_cnt = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1;  in hal_av1d_release_res()
1370     MPP_FREE(p_hal->reg_ctx);  in hal_av1d_release_res()
1383     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_init()  local
1384     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_init()
1389     mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64);  in vdpu383_av1d_init()
1390     mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, rkv_ver_align);  in vdpu383_av1d_init()
1391     mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align);  in vdpu383_av1d_init()
1423 static MPP_RET prepare_uncompress_header(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva,  in prepare_uncompress_header()  argument
1428     (void) p_hal;  in prepare_uncompress_header()
1915 static void vdpu383_av1d_rcb_setup(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)  in vdpu383_av1d_rcb_setup()  argument
1917     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_rcb_setup()
1919     RK_U32 max_cnt = p_hal->fast_mode ? VDPU_FAST_REG_SET_CNT : 1;  in vdpu383_av1d_rcb_setup()
1944         mpp_buffer_get(p_hal->buf_group, &rcb_buf, reg_ctx->rcb_buf_size);  in vdpu383_av1d_rcb_setup()
1954 static void vdpu383_av1d_rcb_reg_cfg(Av1dHalCtx *p_hal, MppBuffer buf)  in vdpu383_av1d_rcb_reg_cfg()  argument
1956     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_rcb_reg_cfg()
1986 …mpp_dev_set_reg_offset(p_hal->dev, reg_ctx->rcb_buf_info[i].reg_idx, reg_ctx->rcb_buf_info[i].offs…  in vdpu383_av1d_rcb_reg_cfg()
1989 static MPP_RET vdpu383_av1d_colmv_setup(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)  in vdpu383_av1d_colmv_setup()  argument
1992     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_colmv_setup()
2009         reg_ctx->colmv_count = mpp_buf_slot_get_count(p_hal->slots);  in vdpu383_av1d_colmv_setup()
2017 static MPP_RET vdpu383_av1d_cdf_setup(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)  in vdpu383_av1d_cdf_setup()  argument
2020     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_cdf_setup()
2041         reg_ctx->cdf_segid_count = mpp_buf_slot_get_count(p_hal->slots);  in vdpu383_av1d_cdf_setup()
2071 static void vdpu383_av1d_set_cdf(Av1dHalCtx *p_hal, DXVA_PicParams_AV1 *dxva)  in vdpu383_av1d_set_cdf()  argument
2073     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_set_cdf()
2142     mpp_dev_set_reg_offset(p_hal->dev, 178, NON_COEF_CDF_SIZE + COEF_CDF_SIZE * coeff_cdf_idx);  in vdpu383_av1d_set_cdf()
2143     mpp_dev_set_reg_offset(p_hal->dev, 179, NON_COEF_CDF_SIZE);  in vdpu383_av1d_set_cdf()
2144     mpp_dev_set_reg_offset(p_hal->dev, 181, ALL_CDF_SIZE);  in vdpu383_av1d_set_cdf()
2145     mpp_dev_set_reg_offset(p_hal->dev, 182, ALL_CDF_SIZE);  in vdpu383_av1d_set_cdf()
2178     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_gen_regs()  local
2179     Vdpu383Av1dRegCtx *ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_gen_regs()
2186     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_gen_regs()
2197     mpp_buf_slot_get_prop(p_hal->slots, dxva->CurrPic.Index7Bits, SLOT_FRAME_PTR, &mframe);  in vdpu383_av1d_gen_regs()
2200         vdpu383_setup_scale_origin_bufs(p_hal, mframe);  in vdpu383_av1d_gen_regs()
2203     if (p_hal->fast_mode) {  in vdpu383_av1d_gen_regs()
2216     p_hal->strm_len = (RK_S32)mpp_packet_get_length(task->dec.input_packet);  in vdpu383_av1d_gen_regs()
2278 …  prepare_uncompress_header(p_hal, dxva, (RK_U64 *)ctx->header_data, sizeof(ctx->header_data) / 8);  in vdpu383_av1d_gen_regs()
2293         p_hal->strm_len = (RK_S32)mpp_packet_get_length(task->dec.input_packet);  in vdpu383_av1d_gen_regs()
2294         regs->av1d_paras.reg66_stream_len = MPP_ALIGN(p_hal->strm_len + 15, 128);  in vdpu383_av1d_gen_regs()
2295         mpp_buf_slot_get_prop(p_hal->packet_slots, task->dec.input, SLOT_BUFFER, &mbuffer);  in vdpu383_av1d_gen_regs()
2298         mpp_dev_set_reg_offset(p_hal->dev, 128, ctx->offset_uncomps & 0xfffffff0);  in vdpu383_av1d_gen_regs()
2308                               8 * p_hal->strm_len, 128, 0, 0);  in vdpu383_av1d_gen_regs()
2315                               8 * p_hal->strm_len, 128, 0, 0);  in vdpu383_av1d_gen_regs()
2321     vdpu383_av1d_rcb_setup(p_hal, dxva);  in vdpu383_av1d_gen_regs()
2322 …vdpu383_av1d_rcb_reg_cfg(p_hal, p_hal->fast_mode ? ctx->rcb_bufs[task->dec.reg_index] : ctx->rcb_b…  in vdpu383_av1d_gen_regs()
2332         mpp_buf_slot_get_prop(p_hal->slots, dxva->CurrPic.Index7Bits, SLOT_FRAME_PTR, &mframe);  in vdpu383_av1d_gen_regs()
2367 …  mpp_buf_slot_get_prop(p_hal->slots, dxva->frame_refs[mapped_idx].Index, SLOT_FRAME_PTR, &mframe);  in vdpu383_av1d_gen_regs()
2390         mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe);  in vdpu383_av1d_gen_regs()
2391         mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_BUFFER, &mbuffer);  in vdpu383_av1d_gen_regs()
2399 …    mpp_buf_slot_get_prop(p_hal->slots, dxva->frame_refs[mapped_idx].Index, SLOT_BUFFER, &mbuffer);  in vdpu383_av1d_gen_regs()
2412         vdpu383_av1d_colmv_setup(p_hal, dxva);  in vdpu383_av1d_gen_regs()
2436         vdpu383_av1d_cdf_setup(p_hal, dxva);  in vdpu383_av1d_gen_regs()
2437         vdpu383_av1d_set_cdf(p_hal, dxva);  in vdpu383_av1d_gen_regs()
2447         mpp_buf_slot_get_prop(p_hal->slots, dxva->CurrPic.Index7Bits, SLOT_BUFFER, &mbuffer);  in vdpu383_av1d_gen_regs()
2448         mpp_buf_slot_get_prop(p_hal->slots, dxva->CurrPic.Index7Bits,  in vdpu383_av1d_gen_regs()
2461             vdpu383_setup_down_scale(mframe, p_hal->dev, &regs->ctrl_regs,  in vdpu383_av1d_gen_regs()
2466             vdpu383_setup_down_scale(mframe, p_hal->dev, &regs->ctrl_regs,  in vdpu383_av1d_gen_regs()
2483     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_start()  local
2484     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_start()
2490     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_start()
2491     Vdpu383Av1dRegSet *regs = p_hal->fast_mode ?  in vdpu383_av1d_start()
2494     MppDev dev = p_hal->dev;  in vdpu383_av1d_start()
2562     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_wait()  local
2564     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_wait()
2565     Vdpu383Av1dRegCtx *reg_ctx = (Vdpu383Av1dRegCtx *)p_hal->reg_ctx;  in vdpu383_av1d_wait()
2566     Vdpu383Av1dRegSet *p_regs = p_hal->fast_mode ?  in vdpu383_av1d_wait()
2583         mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_BUFFER, &mbuffer);  in vdpu383_av1d_wait()
2603     ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL);  in vdpu383_av1d_wait()
2630         mpp_buf_slot_get_prop(p_hal->slots, task->dec.output, SLOT_FRAME_PTR, &mframe);  in vdpu383_av1d_wait()
2635     if (p_hal->fast_mode)  in vdpu383_av1d_wait()
2646     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_reset()  local
2648     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_reset()
2658     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_flush()  local
2660     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_flush()
2668     Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;  in vdpu383_av1d_control()  local
2671     INP_CHECK(ret, NULL == p_hal);  in vdpu383_av1d_control()
2681             mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_422);  in vdpu383_av1d_control()
2684             vdpu383_afbc_align_calc(p_hal->slots, (MppFrame)param, 16);  in vdpu383_av1d_control()
2686             mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64);  in vdpu383_av1d_control()