1786                                  RK_S32 offset, RK_S32 len, RK_S32 rcb_buf_idx)  in update_size_offset()  argument
1792     info[rcb_buf_idx].offset = offset;  in update_size_offset()
1832         VDPU383_SET_BUF_PROTECT_VAL(&buf_p[reg_ctx->rcb_buf_info[loop].offset],
1848         VDPU383_DUMP_BUF_PROTECT_VAL(&buf_p[reg_ctx->rcb_buf_info[loop].offset],
1918     RK_U32 offset = 0;  in vdpu383_av1d_rcb_setup()  local
1922 …offset += update_size_offset(reg_ctx->rcb_buf_info, 140, offset, VDPU383_RCB_STRMD_ROW_LEN,       …  in vdpu383_av1d_rcb_setup()
1923 …offset += update_size_offset(reg_ctx->rcb_buf_info, 142, offset, VDPU383_RCB_STRMD_TILE_ROW_LEN,  …  in vdpu383_av1d_rcb_setup()
1924 …offset += update_size_offset(reg_ctx->rcb_buf_info, 144, offset, VDPU383_RCB_INTER_ROW_LEN,       …  in vdpu383_av1d_rcb_setup()
1925 …offset += update_size_offset(reg_ctx->rcb_buf_info, 146, offset, VDPU383_RCB_INTER_TILE_ROW_LEN,  …  in vdpu383_av1d_rcb_setup()
1926 …offset += update_size_offset(reg_ctx->rcb_buf_info, 148, offset, VDPU383_RCB_INTRA_ROW_LEN,       …  in vdpu383_av1d_rcb_setup()
1927 …offset += update_size_offset(reg_ctx->rcb_buf_info, 150, offset, VDPU383_RCB_INTRA_TILE_ROW_LEN,  …  in vdpu383_av1d_rcb_setup()
1928 …offset += update_size_offset(reg_ctx->rcb_buf_info, 152, offset, VDPU383_RCB_FILTERD_ROW_LEN,     …  in vdpu383_av1d_rcb_setup()
1929 …offset += update_size_offset(reg_ctx->rcb_buf_info, 154, offset, VDPU383_RCB_FILTERD_PROTECT_ROW_L…  in vdpu383_av1d_rcb_setup()
1930 …offset += update_size_offset(reg_ctx->rcb_buf_info, 156, offset, VDPU383_RCB_FILTERD_TILE_ROW_LEN,…  in vdpu383_av1d_rcb_setup()
1931 …offset += update_size_offset(reg_ctx->rcb_buf_info, 158, offset, VDPU383_RCB_FILTERD_TILE_COL_LEN,…  in vdpu383_av1d_rcb_setup()
1932 …offset += update_size_offset(reg_ctx->rcb_buf_info, 160, offset, VDPU383_RCB_FILTERD_AV1_UP_TL_COL…  in vdpu383_av1d_rcb_setup()
1933     reg_ctx->rcb_buf_size = offset;  in vdpu383_av1d_rcb_setup()
1986 …_dev_set_reg_offset(p_hal->dev, reg_ctx->rcb_buf_info[i].reg_idx, reg_ctx->rcb_buf_info[i].offset);  in vdpu383_av1d_rcb_reg_cfg()
2501         wr_cfg.offset = OFFSET_CTRL_REGS;  in vdpu383_av1d_start()
2510         wr_cfg.offset = OFFSET_COMMON_ADDR_REGS;  in vdpu383_av1d_start()
2519         wr_cfg.offset = OFFSET_AV1D_PARAS_REGS;  in vdpu383_av1d_start()
2528         wr_cfg.offset = OFFSET_AV1D_ADDR_REGS;  in vdpu383_av1d_start()
2537         rd_cfg.offset = OFFSET_INTERRUPT_REGS;  in vdpu383_av1d_start()