2232         regs->ctrl_regs.reg8_dec_mode          = 4; // av1  in vdpu383_av1d_gen_regs()
2233         regs->ctrl_regs.reg9.fbc_e             = 0;  in vdpu383_av1d_gen_regs()
2234         regs->ctrl_regs.reg9.buf_empty_en      = 0;  in vdpu383_av1d_gen_regs()
2236         regs->ctrl_regs.reg10.strmd_auto_gating_e    = 1;  in vdpu383_av1d_gen_regs()
2237         regs->ctrl_regs.reg10.inter_auto_gating_e    = 1;  in vdpu383_av1d_gen_regs()
2238         regs->ctrl_regs.reg10.intra_auto_gating_e    = 1;  in vdpu383_av1d_gen_regs()
2239         regs->ctrl_regs.reg10.transd_auto_gating_e   = 1;  in vdpu383_av1d_gen_regs()
2240         regs->ctrl_regs.reg10.recon_auto_gating_e    = 1;  in vdpu383_av1d_gen_regs()
2241         regs->ctrl_regs.reg10.filterd_auto_gating_e  = 1;  in vdpu383_av1d_gen_regs()
2242         regs->ctrl_regs.reg10.bus_auto_gating_e      = 1;  in vdpu383_av1d_gen_regs()
2243         regs->ctrl_regs.reg10.ctrl_auto_gating_e     = 1;  in vdpu383_av1d_gen_regs()
2244         regs->ctrl_regs.reg10.rcb_auto_gating_e      = 1;  in vdpu383_av1d_gen_regs()
2245         regs->ctrl_regs.reg10.err_prc_auto_gating_e  = 1;  in vdpu383_av1d_gen_regs()
2249         regs->ctrl_regs.reg13_core_timeout_threshold  = 0x3fffff;  in vdpu383_av1d_gen_regs()
2251         regs->ctrl_regs.reg16.error_proc_disable     = 1;  in vdpu383_av1d_gen_regs()
2252         regs->ctrl_regs.reg16.error_spread_disable   = 0;  in vdpu383_av1d_gen_regs()
2253         regs->ctrl_regs.reg16.roi_error_ctu_cal_en   = 0;  in vdpu383_av1d_gen_regs()
2255         regs->ctrl_regs.reg20_cabac_error_en_lowbits  = 0xffffffdf;  in vdpu383_av1d_gen_regs()
2256         regs->ctrl_regs.reg21_cabac_error_en_highbits = 0x3fffffff;  in vdpu383_av1d_gen_regs()
2258         regs->ctrl_regs.reg28.axi_perf_work_e = 1;  in vdpu383_av1d_gen_regs()
2259         regs->ctrl_regs.reg28.axi_cnt_type    = 1;  in vdpu383_av1d_gen_regs()
2260         regs->ctrl_regs.reg28.rd_latency_id   = 11;  in vdpu383_av1d_gen_regs()
2262         regs->ctrl_regs.reg29.addr_align_type     = 1;  in vdpu383_av1d_gen_regs()
2263         regs->ctrl_regs.reg29.ar_cnt_id_type      = 0;  in vdpu383_av1d_gen_regs()
2264         regs->ctrl_regs.reg29.aw_cnt_id_type      = 1;  in vdpu383_av1d_gen_regs()
2265         regs->ctrl_regs.reg29.ar_count_id         = 17;  in vdpu383_av1d_gen_regs()
2266         regs->ctrl_regs.reg29.aw_count_id         = 0;  in vdpu383_av1d_gen_regs()
2267         regs->ctrl_regs.reg29.rd_band_width_mode  = 0;  in vdpu383_av1d_gen_regs()
2269         regs->ctrl_regs.reg30.axi_wr_qos = 0;  in vdpu383_av1d_gen_regs()
2270         regs->ctrl_regs.reg30.axi_rd_qos = 0;  in vdpu383_av1d_gen_regs()
2344                 regs->ctrl_regs.reg9.fbc_e = 1;  in vdpu383_av1d_gen_regs()
2349                 regs->ctrl_regs.reg9.tile_e = 1;  in vdpu383_av1d_gen_regs()
2353                 regs->ctrl_regs.reg9.fbc_e = 0;  in vdpu383_av1d_gen_regs()
2461             vdpu383_setup_down_scale(mframe, p_hal->dev, &regs->ctrl_regs,  in vdpu383_av1d_gen_regs()
2466             vdpu383_setup_down_scale(mframe, p_hal->dev, &regs->ctrl_regs,  in vdpu383_av1d_gen_regs()
2471             regs->ctrl_regs.reg9.scale_down_en = 0;  in vdpu383_av1d_gen_regs()
2499         wr_cfg.reg = &regs->ctrl_regs;  in vdpu383_av1d_start()
2500         wr_cfg.size = sizeof(regs->ctrl_regs);  in vdpu383_av1d_start()
2535         rd_cfg.reg = &regs->ctrl_regs.reg15;  in vdpu383_av1d_start()
2536         rd_cfg.size = sizeof(regs->ctrl_regs.reg15);  in vdpu383_av1d_start()
2621         (!p_regs->ctrl_regs.reg15.rkvdec_frame_rdy_sta) ||  in vdpu383_av1d_wait()
2622         p_regs->ctrl_regs.reg15.rkvdec_strm_error_sta ||  in vdpu383_av1d_wait()
2623         p_regs->ctrl_regs.reg15.rkvdec_core_timeout_sta ||  in vdpu383_av1d_wait()
2624         p_regs->ctrl_regs.reg15.rkvdec_ip_timeout_sta ||  in vdpu383_av1d_wait()
2625         p_regs->ctrl_regs.reg15.rkvdec_bus_error_sta ||  in vdpu383_av1d_wait()
2626         p_regs->ctrl_regs.reg15.rkvdec_buffer_empty_sta ||  in vdpu383_av1d_wait()
2627         p_regs->ctrl_regs.reg15.rkvdec_colmv_ref_error_sta) {  in vdpu383_av1d_wait()