Lines Matching defs:ddr2_spd_eeprom_s

77 typedef struct ddr2_spd_eeprom_s {  struct
78 unsigned char info_size; /* 0 # bytes written into serial memory */
79 unsigned char chip_size; /* 1 Total # bytes of SPD memory device */
80 unsigned char mem_type; /* 2 Fundamental memory type */
81 unsigned char nrow_addr; /* 3 # of Row Addresses on this assembly */
82 unsigned char ncol_addr; /* 4 # of Column Addrs on this assembly */
83 unsigned char mod_ranks; /* 5 Number of DIMM Ranks */
84 unsigned char dataw; /* 6 Module Data Width */
85 unsigned char res_7; /* 7 Reserved */
86 unsigned char voltage; /* 8 Voltage intf std of this assembly */
87 unsigned char clk_cycle; /* 9 SDRAM Cycle time @ CL=X */
88 unsigned char clk_access; /* 10 SDRAM Access from Clk @ CL=X (tAC) */
89 unsigned char config; /* 11 DIMM Configuration type */
90 unsigned char refresh; /* 12 Refresh Rate/Type */
91 unsigned char primw; /* 13 Primary SDRAM Width */
92 unsigned char ecw; /* 14 Error Checking SDRAM width */
93 unsigned char res_15; /* 15 Reserved */
94 unsigned char burstl; /* 16 Burst Lengths Supported */
95 unsigned char nbanks; /* 17 # of Banks on Each SDRAM Device */
96 unsigned char cas_lat; /* 18 CAS# Latencies Supported */
97 unsigned char mech_char; /* 19 DIMM Mechanical Characteristics */
98 unsigned char dimm_type; /* 20 DIMM type information */
99 unsigned char mod_attr; /* 21 SDRAM Module Attributes */
100 unsigned char dev_attr; /* 22 SDRAM Device Attributes */
101 unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time @ CL=X-1 */
102 unsigned char clk_access2; /* 24 SDRAM Access from Clk @ CL=X-1 (tAC) */
103 unsigned char clk_cycle3; /* 25 Min SDRAM Cycle time @ CL=X-2 */
104 unsigned char clk_access3; /* 26 Max Access from Clk @ CL=X-2 (tAC) */
105 unsigned char trp; /* 27 Min Row Precharge Time (tRP)*/
106 unsigned char trrd; /* 28 Min Row Active to Row Active (tRRD) */
107 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */
108 unsigned char tras; /* 30 Minimum RAS Pulse Width (tRAS) */
109 unsigned char rank_dens; /* 31 Density of each rank on module */
110 unsigned char ca_setup; /* 32 Addr+Cmd Setup Time Before Clk (tIS) */
111 unsigned char ca_hold; /* 33 Addr+Cmd Hold Time After Clk (tIH) */
112 unsigned char data_setup; /* 34 Data Input Setup Time
114 unsigned char data_hold; /* 35 Data Input Hold Time
116 unsigned char twr; /* 36 Write Recovery time tWR */
117 unsigned char twtr; /* 37 Int write to read delay tWTR */
118 unsigned char trtp; /* 38 Int read to precharge delay tRTP */
119 unsigned char mem_probe; /* 39 Mem analysis probe characteristics */
120 unsigned char trctrfc_ext; /* 40 Extensions to trc and trfc */
121 unsigned char trc; /* 41 Min Active to Auto refresh time tRC */
122 unsigned char trfc; /* 42 Min Auto to Active period tRFC */
123 unsigned char tckmax; /* 43 Max device cycle time tCKmax */
124 unsigned char tdqsq; /* 44 Max DQS to DQ skew (tDQSQ max) */
125 unsigned char tqhs; /* 45 Max Read DataHold skew (tQHS) */
126 unsigned char pll_relock; /* 46 PLL Relock time */
127 unsigned char t_casemax; /* 47 Tcasemax */
128 unsigned char psi_ta_dram; /* 48 Thermal Resistance of DRAM Package from
130 unsigned char dt0_mode; /* 49 DRAM Case Temperature Rise from Ambient
133 unsigned char dt2n_dt2q; /* 50 DRAM Case Temperature Rise from Ambient
136 unsigned char dt2p; /* 51 DRAM Case Temperature Rise from Ambient
138 unsigned char dt3n; /* 52 DRAM Case Temperature Rise from Ambient
140 unsigned char dt3pfast; /* 53 DRAM Case Temperature Rise from Ambient
143 unsigned char dt3pslow; /* 54 DRAM Case Temperature Rise from Ambient
146 unsigned char dt4r_dt4r4w; /* 55 DRAM Case Temperature Rise from Ambient
149 unsigned char dt5b; /* 56 DRAM Case Temperature Rise from Ambient
151 unsigned char dt7; /* 57 DRAM Case Temperature Rise from Ambient
154 unsigned char psi_ta_pll; /* 58 Thermal Resistance of PLL Package form
156 unsigned char psi_ta_reg; /* 59 Thermal Reisitance of Register Package
159 unsigned char dtpllactive; /* 60 PLL Case Temperature Rise from Ambient
161 unsigned char dtregact; /* 61 Register Case Temperature Rise from
164 unsigned char spd_rev; /* 62 SPD Data Revision Code */
165 unsigned char cksum; /* 63 Checksum for bytes 0-62 */
166 unsigned char mid[8]; /* 64 Mfr's JEDEC ID code per JEP-106 */
167 unsigned char mloc; /* 72 Manufacturing Location */
168 unsigned char mpart[18]; /* 73 Manufacturer's Part Number */
169 unsigned char rev[2]; /* 91 Revision Code */
170 unsigned char mdate[2]; /* 93 Manufacturing Date */
171 unsigned char sernum[4]; /* 95 Assembly Serial Number */
172 unsigned char mspec[27]; /* 99-127 Manufacturer Specific Data */