Lines Matching refs:timing
30 struct display_timing *timing) in rk_mipi_read_timing() argument
35 0, timing); in rk_mipi_read_timing()
80 const struct display_timing *timing) in rk_mipi_dsi_enable() argument
92 rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); in rk_mipi_dsi_enable()
93 rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); in rk_mipi_dsi_enable()
94 rk_mipi_dsi_write(regs, VID_HLINE_TIME, (timing->hsync_len.typ in rk_mipi_dsi_enable()
95 + timing->hback_porch.typ + timing->hactive.typ in rk_mipi_dsi_enable()
96 + timing->hfront_porch.typ)); in rk_mipi_dsi_enable()
97 rk_mipi_dsi_write(regs, VID_VSA_LINES, timing->vsync_len.typ); in rk_mipi_dsi_enable()
98 rk_mipi_dsi_write(regs, VID_VBP_LINES, timing->vback_porch.typ); in rk_mipi_dsi_enable()
99 rk_mipi_dsi_write(regs, VID_VFP_LINES, timing->vfront_porch.typ); in rk_mipi_dsi_enable()
100 rk_mipi_dsi_write(regs, VID_ACTIVE_LINES, timing->vactive.typ); in rk_mipi_dsi_enable()
103 val = (timing->flags & DISPLAY_FLAGS_HSYNC_LOW) ? 1 : 0; in rk_mipi_dsi_enable()
106 val = (timing->flags & DISPLAY_FLAGS_VSYNC_LOW) ? 1 : 0; in rk_mipi_dsi_enable()
109 val = (timing->flags & DISPLAY_FLAGS_DE_LOW) ? 1 : 0; in rk_mipi_dsi_enable()
112 val = (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) ? 1 : 0; in rk_mipi_dsi_enable()