313 static inline void tcon_write(struct ebc_tcon_priv *tcon, unsigned int reg,  in tcon_write()  function
384 	tcon_write(tcon, EBC_DSP_HTIMING0,  in ebc_tcon_enable()
387 	tcon_write(tcon, EBC_DSP_HTIMING1,  in ebc_tcon_enable()
390 	tcon_write(tcon, EBC_DSP_VTIMING0,  in ebc_tcon_enable()
393 	tcon_write(tcon, EBC_DSP_VTIMING1,  in ebc_tcon_enable()
396 	tcon_write(tcon, EBC_DSP_ACT_INFO,  in ebc_tcon_enable()
399 	tcon_write(tcon, EBC_WIN_VIR,  in ebc_tcon_enable()
402 	tcon_write(tcon, EBC_WIN_ACT,  in ebc_tcon_enable()
405 	tcon_write(tcon, EBC_WIN_DSP,  in ebc_tcon_enable()
408 	tcon_write(tcon, EBC_WIN_DSP_ST,  in ebc_tcon_enable()
416 	tcon_write(tcon, EBC_WIN_CTRL,  in ebc_tcon_enable()
434 	tcon_write(tcon, EBC_EPD_CTRL,  in ebc_tcon_enable()
443 	tcon_write(tcon, EBC_DSP_START,  in ebc_tcon_enable()
446 	tcon_write(tcon, EBC_DSP_CTRL,  in ebc_tcon_enable()
497 	tcon_write(tcon, EBC_WIN_MST0, pre_image_addr);  in ebc_tcon_image_addr_set()
498 	tcon_write(tcon, EBC_WIN_MST1, cur_image_addr);  in ebc_tcon_image_addr_set()
508 	tcon_write(tcon, EBC_WIN_MST2, frame_addr);  in ebc_tcon_frame_addr_set()
531 		tcon_write(tcon, EBC_LUT_DATA_ADDR + (i * 4), lut_data[i]);  in ebc_tcon_lut_data_set()
574 	tcon_write(tcon, EBC_INT_STATUS,  in ebc_tcon_frame_start()
608 	tcon_write(tcon, RK3576_EBC_DSP_HTIMING0,  in rk3576_ebc_tcon_enable()
611 	tcon_write(tcon, RK3576_EBC_DSP_HTIMING1,  in rk3576_ebc_tcon_enable()
614 	tcon_write(tcon, RK3576_EBC_DSP_VTIMING0,  in rk3576_ebc_tcon_enable()
617 	tcon_write(tcon, RK3576_EBC_DSP_VTIMING1,  in rk3576_ebc_tcon_enable()
620 	tcon_write(tcon, RK3576_EBC_DSP_ACT_INFO,  in rk3576_ebc_tcon_enable()
623 	tcon_write(tcon, RK3576_EBC_WIN_VIR,  in rk3576_ebc_tcon_enable()
626 	tcon_write(tcon, RK3576_EBC_WIN_ACT,  in rk3576_ebc_tcon_enable()
629 	tcon_write(tcon, RK3576_EBC_WIN_DSP,  in rk3576_ebc_tcon_enable()
653 		tcon_write(tcon, RK3576_EBC_WIN_DSP_ST, val);  in rk3576_ebc_tcon_enable()
655 		tcon_write(tcon, RK3576_EBC_WIN_DSP_ST,  in rk3576_ebc_tcon_enable()
666 	tcon_write(tcon, RK3576_EBC_WIN_CTRL,  in rk3576_ebc_tcon_enable()
673 	tcon_write(tcon, RK3576_EBC_WIN0_CTRL, RK3576_WIN_AXI_GATHER_NUM(8) |  in rk3576_ebc_tcon_enable()
676 	tcon_write(tcon, RK3576_EBC_WIN1_CTRL, RK3576_WIN_RID(2));  in rk3576_ebc_tcon_enable()
677 	tcon_write(tcon, RK3576_EBC_WIN2_CTRL, RK3576_WIN_RID(3));  in rk3576_ebc_tcon_enable()
689 	tcon_write(tcon, RK3576_EBC_EPD_CTRL, RK3576_EINK_MODE_SWAP(1) |  in rk3576_ebc_tcon_enable()
698 	tcon_write(tcon, RK3576_EBC_DSP_START, 0);  in rk3576_ebc_tcon_enable()
704 	tcon_write(tcon, RK3576_EBC_DSP_CTRL2, RK3576_SW_BURST_CTRL | val);  in rk3576_ebc_tcon_enable()
715 	tcon_write(tcon, RK3576_EBC_DSP_CTRL,  in rk3576_ebc_tcon_enable()
737 	tcon_write(tcon, RK3576_EBC_WIN1_CTRL, RK3576_WIN_AXI_GATHER_NUM(8) |  in rk3576_ebc_tcon_dsp_mode_set()
741 	tcon_write(tcon, RK3576_EBC_WIN2_CTRL, RK3576_WIN_AXI_GATHER_NUM(8) |  in rk3576_ebc_tcon_dsp_mode_set()
764 	tcon_write(tcon, RK3576_EBC_INT_STATUS, RK3576_LINE_FLAG_INT_MASK |  in rk3576_ebc_tcon_frame_start()
774 	tcon_write(tcon, RK3576_EBC_DSP_START, 1);  in rk3576_ebc_tcon_frame_start()