156 	__raw_writel(reg, clk->enable_reg);  in clk_ipu_enable()
162 	__raw_writel(reg, &mxc_ccm->ccdr);  in clk_ipu_enable()
167 	__raw_writel(reg, &mxc_ccm->clpcr);  in clk_ipu_enable()
178 	__raw_writel(reg, clk->enable_reg);  in clk_ipu_disable()
187 	__raw_writel(reg, &mxc_ccm->ccdr);  in clk_ipu_disable()
192 	__raw_writel(reg, &mxc_ccm->clpcr);  in clk_ipu_disable()
347 	__raw_writel(div, DI_BS_CLKGEN0(clk->id));  in ipu_pixel_clk_set_rate()
353 	__raw_writel((div / 16) << 16, DI_BS_CLKGEN1(clk->id));  in ipu_pixel_clk_set_rate()
366 	__raw_writel(disp_gen, IPU_DISP_GEN);  in ipu_pixel_clk_enable()
375 	__raw_writel(disp_gen, IPU_DISP_GEN);  in ipu_pixel_clk_disable()
390 	__raw_writel(di_gen, DI_GENERAL(clk->id));  in ipu_pixel_clk_set_parent()
432 	__raw_writel(value, reg);  in ipu_reset()
461 	 __raw_writel(0xF00, reg_hsc_mcd);  in ipu_probe()
465 	 __raw_writel(temp | 0x0FF, reg_hsc_mxt_conf);  in ipu_probe()
468 	__raw_writel(temp | 0x10000, reg_hsc_mxt_conf);  in ipu_probe()
491 	__raw_writel(0x807FFFFF, IPU_MEM_RST);  in ipu_probe()
497 	__raw_writel(0, IPU_INT_CTRL(5));  in ipu_probe()
498 	__raw_writel(0, IPU_INT_CTRL(6));  in ipu_probe()
499 	__raw_writel(0, IPU_INT_CTRL(9));  in ipu_probe()
500 	__raw_writel(0, IPU_INT_CTRL(10));  in ipu_probe()
506 	__raw_writel(0x18800000L, IDMAC_CHA_PRI(0));  in ipu_probe()
509 	__raw_writel(0x00400000L | (IPU_MCU_T_DEFAULT << 18), IPU_DISP_GEN);  in ipu_probe()
640 	__raw_writel(ipu_conf, IPU_CONF);  in ipu_init_channel()
682 	__raw_writel(reg & ~idma_mask(in_dma), IPU_CHA_DB_MODE_SEL(in_dma));  in ipu_uninit_channel()
684 	__raw_writel(reg & ~idma_mask(out_dma), IPU_CHA_DB_MODE_SEL(out_dma));  in ipu_uninit_channel()
726 	__raw_writel(ipu_conf, IPU_CONF);  in ipu_uninit_channel()
1034 	__raw_writel(reg, IPU_CHA_DB_MODE_SEL(dma_chan));  in ipu_init_channel_buffer()
1037 	__raw_writel(idma_mask(dma_chan), IPU_CHA_CUR_BUF(dma_chan));  in ipu_init_channel_buffer()
1067 		__raw_writel(reg | idma_mask(in_dma), IDMAC_CHA_EN(in_dma));  in ipu_enable_channel()
1071 		__raw_writel(reg | idma_mask(out_dma), IDMAC_CHA_EN(out_dma));  in ipu_enable_channel()
1102 	__raw_writel(0xF0000000, IPU_GPR); /* write one to clear */  in ipu_clear_buffer_ready()
1105 			__raw_writel(idma_mask(dma_ch),  in ipu_clear_buffer_ready()
1110 			__raw_writel(idma_mask(dma_ch),  in ipu_clear_buffer_ready()
1114 	__raw_writel(0x0, IPU_GPR); /* write one to set */  in ipu_clear_buffer_ready()
1158 		__raw_writel(reg & ~idma_mask(in_dma), IDMAC_CHA_EN(in_dma));  in ipu_disable_channel()
1159 		__raw_writel(idma_mask(in_dma), IPU_CHA_CUR_BUF(in_dma));  in ipu_disable_channel()
1163 		__raw_writel(reg & ~idma_mask(out_dma), IDMAC_CHA_EN(out_dma));  in ipu_disable_channel()
1164 		__raw_writel(idma_mask(out_dma), IPU_CHA_CUR_BUF(out_dma));  in ipu_disable_channel()