26 	reg = readl(&mipi_dsim->swrst);  in exynos_mipi_dsi_func_reset()
40 	reg = readl(&mipi_dsim->swrst);  in exynos_mipi_dsi_sw_reset()
52 	unsigned int reg = readl(&mipi_dsim->intsrc);  in exynos_mipi_dsi_sw_release()
64 	unsigned int reg = readl(&mipi_dsim->intmsk);  in exynos_mipi_dsi_set_interrupt_mask()
81 	reg = readl(&mipi_dsim->fifoctrl);  in exynos_mipi_dsi_init_fifo_pointer()
110 	reg = (readl(&mipi_dsim->mdresol)) & ~(DSIM_MAIN_STAND_BY);  in exynos_mipi_dsi_set_main_disp_resol()
128 	reg = (readl(&mipi_dsim->mvporch)) &  in exynos_mipi_dsi_set_main_disp_vporch()
146 	reg = (readl(&mipi_dsim->mhporch)) &  in exynos_mipi_dsi_set_main_disp_hporch()
161 	reg = (readl(&mipi_dsim->msync)) &  in exynos_mipi_dsi_set_main_disp_sync_area()
177 	reg = (readl(&mipi_dsim->sdresol)) &  in exynos_mipi_dsi_set_sub_disp_resol()
197 	unsigned int cfg = (readl(&mipi_dsim->config)) &  in exynos_mipi_dsi_init_config()
220 	u32 reg = (readl(&mipi_dsim->config)) &  in exynos_mipi_dsi_display_config()
249 	reg = readl(&mipi_dsim->config);  in exynos_mipi_dsi_enable_lane()
277 	unsigned int reg = readl(&mipi_dsim->phyacchr);  in exynos_mipi_dsi_enable_afc()
296 	unsigned int reg = (readl(&mipi_dsim->clkctrl)) &  in exynos_mipi_dsi_enable_pll_bypass()
309 	unsigned int reg = (readl(&mipi_dsim->pllctrl)) &  in exynos_mipi_dsi_pll_freq_band()
323 	unsigned int reg = (readl(&mipi_dsim->pllctrl)) &  in exynos_mipi_dsi_pll_freq()
347 	unsigned int reg = (readl(&mipi_dsim->pllctrl)) &  in exynos_mipi_dsi_enable_pll()
360 	unsigned int reg = (readl(&mipi_dsim->clkctrl)) &  in exynos_mipi_dsi_set_byte_clock_src()
373 	unsigned int reg = (readl(&mipi_dsim->clkctrl)) &  in exynos_mipi_dsi_enable_byte_clock()
386 	unsigned int reg = (readl(&mipi_dsim->clkctrl)) &  in exynos_mipi_dsi_set_esc_clk_prs()
401 	unsigned int reg = readl(&mipi_dsim->clkctrl);  in exynos_mipi_dsi_enable_esc_clk_on_lane()
416 	unsigned int reg = (readl(&mipi_dsim->escmode)) &  in exynos_mipi_dsi_force_dphy_stop_state()
428 	unsigned int reg = readl(&mipi_dsim->status);  in exynos_mipi_dsi_is_lane_state()
449 	unsigned int reg = (readl(&mipi_dsim->escmode)) &  in exynos_mipi_dsi_set_stop_state_counter()
462 	unsigned int reg = (readl(&mipi_dsim->timeout)) &  in exynos_mipi_dsi_set_bta_timeout()
475 	unsigned int reg = (readl(&mipi_dsim->timeout)) &  in exynos_mipi_dsi_set_lpdr_timeout()
488 	unsigned int reg = readl(&mipi_dsim->escmode);  in exynos_mipi_dsi_set_cpu_transfer_mode()
503 	unsigned int reg = readl(&mipi_dsim->escmode);  in exynos_mipi_dsi_set_lcdc_transfer_mode()
518 	unsigned int reg = (readl(&mipi_dsim->clkctrl)) &  in exynos_mipi_dsi_enable_hs_clock()
531 	unsigned int reg = readl(&mipi_dsim->phyacchr1);  in exynos_mipi_dsi_dp_dn_swap()
544 	unsigned int reg = (readl(&mipi_dsim->pllctrl)) &  in exynos_mipi_dsi_hs_zero_ctrl()
556 	unsigned int reg = (readl(&mipi_dsim->pllctrl)) &  in exynos_mipi_dsi_prep_ctrl()
568 	unsigned int reg = readl(&mipi_dsim->intsrc);  in exynos_mipi_dsi_clear_interrupt()
589 	reg = readl(&mipi_dsim->status);  in exynos_mipi_dsi_is_pll_stable()
599 	return readl(&mipi_dsim->fifoctrl) & ~(0x1f);  in exynos_mipi_dsi_get_fifo_state()
618 	unsigned int reg = readl(&mipi_dsim->intsrc);  in _exynos_mipi_dsi_get_frame_done_status()
627 	unsigned int reg = readl(&mipi_dsim->intsrc);  in _exynos_mipi_dsi_clear_frame_done()