Lines Matching refs:clkctrl
296 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_enable_pll_bypass()
301 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_pll_bypass()
360 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_set_byte_clock_src()
365 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_set_byte_clock_src()
373 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_enable_byte_clock()
378 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_byte_clock()
386 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_set_esc_clk_prs()
393 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_set_esc_clk_prs()
401 unsigned int reg = readl(&mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_esc_clk_on_lane()
408 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_esc_clk_on_lane()
518 unsigned int reg = (readl(&mipi_dsim->clkctrl)) & in exynos_mipi_dsi_enable_hs_clock()
523 writel(reg, &mipi_dsim->clkctrl); in exynos_mipi_dsi_enable_hs_clock()