60 	int i;  in exynos_dp_calc_edid_check_sum()  local
63 	for (i = 0; i < EDID_BLOCK_LENGTH; i++)  in exynos_dp_calc_edid_check_sum()
64 		sum = sum + edid_data[i];  in exynos_dp_calc_edid_check_sum()
386 	unsigned int ret, i;  in exynos_dp_read_dpcd_lane_stat()  local
403 	for (i = 0; i < priv->lane_cnt; i++) {  in exynos_dp_read_dpcd_lane_stat()
404 		lane_stat[i] = (buf[(i / 2)] >> shift_val[i]) & 0x0f;  in exynos_dp_read_dpcd_lane_stat()
405 		if (lane_stat[0] != lane_stat[i]) {  in exynos_dp_read_dpcd_lane_stat()
490 	unsigned int i;  in exynos_dp_process_clock_recovery()  local
509 		for (i = 0; i < priv->lane_cnt; i++) {  in exynos_dp_process_clock_recovery()
510 			ret = exynos_dp_read_dpcd_adj_req(regs, i,  in exynos_dp_process_clock_recovery()
517 			lt_ctl_val[i] = 0;  in exynos_dp_process_clock_recovery()
518 			lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw;  in exynos_dp_process_clock_recovery()
522 				lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |  in exynos_dp_process_clock_recovery()
526 							 lt_ctl_val[i], i);  in exynos_dp_process_clock_recovery()
544 		for (i = 0; i < priv->lane_cnt; i++) {  in exynos_dp_process_clock_recovery()
545 			lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis(  in exynos_dp_process_clock_recovery()
546 						regs, i);  in exynos_dp_process_clock_recovery()
547 				ret = exynos_dp_read_dpcd_adj_req(regs, i,  in exynos_dp_process_clock_recovery()
560 			if ((DRIVE_CURRENT_SET_0_GET(lt_ctl_val[i]) ==  in exynos_dp_process_clock_recovery()
562 				(PRE_EMPHASIS_SET_0_GET(lt_ctl_val[i]) ==  in exynos_dp_process_clock_recovery()
564 				priv->lt_info.cr_loop[i]++;  in exynos_dp_process_clock_recovery()
565 				if (priv->lt_info.cr_loop[i] == MAX_CR_LOOP)  in exynos_dp_process_clock_recovery()
570 			lt_ctl_val[i] = 0;  in exynos_dp_process_clock_recovery()
571 			lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw;  in exynos_dp_process_clock_recovery()
575 				lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |  in exynos_dp_process_clock_recovery()
579 							 lt_ctl_val[i], i);  in exynos_dp_process_clock_recovery()
598 	unsigned char lane_stat, adj_req_sw, adj_req_em, i;  in exynos_dp_process_equalizer_training()  local
628 		for (i = 0; i < priv->lane_cnt; i++) {  in exynos_dp_process_equalizer_training()
629 			ret = exynos_dp_read_dpcd_adj_req(regs, i,  in exynos_dp_process_equalizer_training()
638 			lt_ctl_val[i] = 0;  in exynos_dp_process_equalizer_training()
639 			lt_ctl_val[i] = adj_req_em << 3 | adj_req_sw;  in exynos_dp_process_equalizer_training()
643 				lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3;  in exynos_dp_process_equalizer_training()
644 				lt_ctl_val[i] |= MAX_PRE_EMPHASIS_REACH_3;  in exynos_dp_process_equalizer_training()
677 				for (i = 0; i < priv->lane_cnt; i++)  in exynos_dp_process_equalizer_training()
679 						regs, lt_ctl_val[i], i);  in exynos_dp_process_equalizer_training()