Lines Matching refs:VOP_CTRL_SET
41 VOP_CTRL_SET(vop, mcu_rs, v); in set_vop_mcu_rs()
196 VOP_CTRL_SET(vop, dsp_lut_en, 1); in rockchip_vop_init_gamma()
197 VOP_CTRL_SET(vop, update_gamma_lut, 1); in rockchip_vop_init_gamma()
224 VOP_CTRL_SET(vop, hpost_st_end, val); in vop_post_config()
229 VOP_CTRL_SET(vop, vpost_st_end, val); in vop_post_config()
232 VOP_CTRL_SET(vop, post_scl_factor, val); in vop_post_config()
235 VOP_CTRL_SET(vop, post_scl_ctrl, in vop_post_config()
243 VOP_CTRL_SET(vop, vpost_st_end_f1, val); in vop_post_config()
254 VOP_CTRL_SET(vop, mcu_frame_st, 0); in vop_mcu_bypass_mode_setup()
255 VOP_CTRL_SET(vop, mcu_clk_sel, 1); in vop_mcu_bypass_mode_setup()
256 VOP_CTRL_SET(vop, mcu_type, 1); in vop_mcu_bypass_mode_setup()
258 VOP_CTRL_SET(vop, mcu_hold_mode, 1); in vop_mcu_bypass_mode_setup()
259 VOP_CTRL_SET(vop, mcu_pix_total, 53); in vop_mcu_bypass_mode_setup()
260 VOP_CTRL_SET(vop, mcu_cs_pst, 6); in vop_mcu_bypass_mode_setup()
261 VOP_CTRL_SET(vop, mcu_cs_pend, 48); in vop_mcu_bypass_mode_setup()
262 VOP_CTRL_SET(vop, mcu_rw_pst, 12); in vop_mcu_bypass_mode_setup()
263 VOP_CTRL_SET(vop, mcu_rw_pend, 30); in vop_mcu_bypass_mode_setup()
275 VOP_CTRL_SET(vop, mcu_frame_st, 0); in vop_mcu_mode_setup()
276 VOP_CTRL_SET(vop, mcu_clk_sel, 1); in vop_mcu_mode_setup()
277 VOP_CTRL_SET(vop, mcu_type, 1); in vop_mcu_mode_setup()
279 VOP_CTRL_SET(vop, mcu_hold_mode, 1); in vop_mcu_mode_setup()
280 VOP_CTRL_SET(vop, mcu_pix_total, crtc_state->mcu_timing.mcu_pix_total); in vop_mcu_mode_setup()
281 VOP_CTRL_SET(vop, mcu_cs_pst, crtc_state->mcu_timing.mcu_cs_pst); in vop_mcu_mode_setup()
282 VOP_CTRL_SET(vop, mcu_cs_pend, crtc_state->mcu_timing.mcu_cs_pend); in vop_mcu_mode_setup()
283 VOP_CTRL_SET(vop, mcu_rw_pst, crtc_state->mcu_timing.mcu_rw_pst); in vop_mcu_mode_setup()
284 VOP_CTRL_SET(vop, mcu_rw_pend, crtc_state->mcu_timing.mcu_rw_pend); in vop_mcu_mode_setup()
306 VOP_CTRL_SET(vop, out_mode, mode); in vop_set_out_mode()
399 VOP_CTRL_SET(vop, global_regdone_en, 1); in rockchip_vop_init()
400 VOP_CTRL_SET(vop, axi_outstanding_max_num, 30); in rockchip_vop_init()
401 VOP_CTRL_SET(vop, axi_max_outstanding_en, 1); in rockchip_vop_init()
402 VOP_CTRL_SET(vop, reg_done_frm, 1); in rockchip_vop_init()
403 VOP_CTRL_SET(vop, win_gate[0], 1); in rockchip_vop_init()
404 VOP_CTRL_SET(vop, win_gate[1], 1); in rockchip_vop_init()
405 VOP_CTRL_SET(vop, win_channel[0], 0x12); in rockchip_vop_init()
406 VOP_CTRL_SET(vop, win_channel[1], 0x34); in rockchip_vop_init()
407 VOP_CTRL_SET(vop, win_channel[2], 0x56); in rockchip_vop_init()
408 VOP_CTRL_SET(vop, dsp_blank, 0); in rockchip_vop_init()
412 VOP_CTRL_SET(vop, enable, 1); in rockchip_vop_init()
419 VOP_CTRL_SET(vop, dclk_pol, dclk_inv); in rockchip_vop_init()
424 VOP_CTRL_SET(vop, pin_pol, val); in rockchip_vop_init()
428 VOP_CTRL_SET(vop, rgb_en, 1); in rockchip_vop_init()
429 VOP_CTRL_SET(vop, rgb_pin_pol, val); in rockchip_vop_init()
430 VOP_CTRL_SET(vop, rgb_dclk_pol, dclk_inv); in rockchip_vop_init()
431 VOP_CTRL_SET(vop, lvds_en, 1); in rockchip_vop_init()
432 VOP_CTRL_SET(vop, lvds_pin_pol, val); in rockchip_vop_init()
433 VOP_CTRL_SET(vop, lvds_dclk_pol, dclk_inv); in rockchip_vop_init()
437 VOP_CTRL_SET(vop, bt1120_en, 1); in rockchip_vop_init()
439 VOP_CTRL_SET(vop, bt1120_yc_swap, yc_swap); in rockchip_vop_init()
440 VOP_CTRL_SET(vop, yuv_clip, 1); in rockchip_vop_init()
442 VOP_CTRL_SET(vop, bt656_en, 1); in rockchip_vop_init()
444 VOP_CTRL_SET(vop, bt1120_yc_swap, yc_swap); in rockchip_vop_init()
448 VOP_CTRL_SET(vop, edp_en, 1); in rockchip_vop_init()
449 VOP_CTRL_SET(vop, edp_pin_pol, val); in rockchip_vop_init()
450 VOP_CTRL_SET(vop, edp_dclk_pol, dclk_inv); in rockchip_vop_init()
451 VOP_CTRL_SET(vop, inf_out_en, 1); in rockchip_vop_init()
452 VOP_CTRL_SET(vop, out_dresetn, 1); in rockchip_vop_init()
456 VOP_CTRL_SET(vop, hdmi_en, 1); in rockchip_vop_init()
457 VOP_CTRL_SET(vop, hdmi_pin_pol, val); in rockchip_vop_init()
458 VOP_CTRL_SET(vop, hdmi_dclk_pol, 1); in rockchip_vop_init()
459 VOP_CTRL_SET(vop, inf_out_en, 1); in rockchip_vop_init()
460 VOP_CTRL_SET(vop, out_dresetn, 1); in rockchip_vop_init()
472 VOP_CTRL_SET(vop, mipi_en, 1); in rockchip_vop_init()
473 VOP_CTRL_SET(vop, mipi_pin_pol, val); in rockchip_vop_init()
474 VOP_CTRL_SET(vop, mipi_dclk_pol, dclk_inv); in rockchip_vop_init()
475 VOP_CTRL_SET(vop, mipi_dual_channel_en, in rockchip_vop_init()
477 VOP_CTRL_SET(vop, data01_swap, in rockchip_vop_init()
480 VOP_CTRL_SET(vop, inf_out_en, 1); in rockchip_vop_init()
481 VOP_CTRL_SET(vop, out_dresetn, 1); in rockchip_vop_init()
488 VOP_CTRL_SET(vop, dp_dclk_pol, 0); in rockchip_vop_init()
489 VOP_CTRL_SET(vop, dp_pin_pol, val); in rockchip_vop_init()
490 VOP_CTRL_SET(vop, dp_en, 1); in rockchip_vop_init()
494 VOP_CTRL_SET(vop, tve_sw_mode, 1); in rockchip_vop_init()
496 VOP_CTRL_SET(vop, tve_sw_mode, 0); in rockchip_vop_init()
497 VOP_CTRL_SET(vop, tve_dclk_pol, 1); in rockchip_vop_init()
498 VOP_CTRL_SET(vop, tve_dclk_en, 1); in rockchip_vop_init()
500 VOP_CTRL_SET(vop, hdmi_pin_pol, val); in rockchip_vop_init()
501 VOP_CTRL_SET(vop, sw_genlock, 1); in rockchip_vop_init()
502 VOP_CTRL_SET(vop, sw_uv_offset_en, 1); in rockchip_vop_init()
503 VOP_CTRL_SET(vop, dither_up, 1); in rockchip_vop_init()
545 VOP_CTRL_SET(vop, dither_down, val); in rockchip_vop_init()
547 VOP_CTRL_SET(vop, dclk_ddr, in rockchip_vop_init()
549 VOP_CTRL_SET(vop, hdmi_dclk_out_en, in rockchip_vop_init()
554 VOP_CTRL_SET(vop, dsp_rb_swap, 1); in rockchip_vop_init()
556 VOP_CTRL_SET(vop, dsp_data_swap, 0); in rockchip_vop_init()
564 VOP_CTRL_SET(vop, dsp_data_swap, DSP_RG_SWAP | DSP_RB_SWAP); in rockchip_vop_init()
567 VOP_CTRL_SET(vop, out_mode, conn_state->output_mode); in rockchip_vop_init()
571 VOP_CTRL_SET(vop, overlay_mode, yuv_overlay); in rockchip_vop_init()
576 VOP_CTRL_SET(vop, dsp_out_yuv, is_yuv_output(conn_state->bus_format)); in rockchip_vop_init()
588 VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en); in rockchip_vop_init()
589 VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en); in rockchip_vop_init()
590 VOP_CTRL_SET(vop, bcsh_r2y_csc_mode, post_csc_mode); in rockchip_vop_init()
591 VOP_CTRL_SET(vop, bcsh_y2r_csc_mode, post_csc_mode); in rockchip_vop_init()
604 VOP_CTRL_SET(vop, dsp_background, val); in rockchip_vop_init()
606 VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); in rockchip_vop_init()
609 VOP_CTRL_SET(vop, hact_st_end, val); in rockchip_vop_init()
612 VOP_CTRL_SET(vop, vact_st_end, val); in rockchip_vop_init()
618 VOP_CTRL_SET(vop, vact_st_end_f1, val); in rockchip_vop_init()
621 VOP_CTRL_SET(vop, vs_st_end_f1, val); in rockchip_vop_init()
622 VOP_CTRL_SET(vop, dsp_interlace, 1); in rockchip_vop_init()
623 VOP_CTRL_SET(vop, p2i_en, 1); in rockchip_vop_init()
627 VOP_CTRL_SET(vop, dsp_interlace, 0); in rockchip_vop_init()
628 VOP_CTRL_SET(vop, p2i_en, 0); in rockchip_vop_init()
631 VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len); in rockchip_vop_init()
633 VOP_CTRL_SET(vop, core_dclk_div, in rockchip_vop_init()
643 VOP_CTRL_SET(vop, standby, 0); in rockchip_vop_init()
899 VOP_CTRL_SET(vop, ymirror, y_mirror); in rockchip_vop_set_plane()
900 VOP_CTRL_SET(vop, xmirror, x_mirror); in rockchip_vop_set_plane()
943 VOP_CTRL_SET(vop, standby, 0); in rockchip_vop_enable()
946 VOP_CTRL_SET(vop, mcu_hold_mode, 0); in rockchip_vop_enable()
956 VOP_CTRL_SET(vop, standby, 1); in rockchip_vop_disable()
1029 VOP_CTRL_SET(vop, mcu_force_rdn, 1); in rockchip_vop_send_mcu_cmd()
1031 VOP_CTRL_SET(vop, mcu_rw_bypass_port, value); in rockchip_vop_send_mcu_cmd()
1035 VOP_CTRL_SET(vop, mcu_force_rdn, 1); in rockchip_vop_send_mcu_cmd()
1037 VOP_CTRL_SET(vop, mcu_rw_bypass_port, value); in rockchip_vop_send_mcu_cmd()
1040 VOP_CTRL_SET(vop, mcu_bypass, value ? 1 : 0); in rockchip_vop_send_mcu_cmd()
1042 VOP_CTRL_SET(vop, mcu_force_rdn, 1); in rockchip_vop_send_mcu_cmd()