Lines Matching refs:crtc_state
569 struct crtc_state *crtc_state = &state->crtc_state; in display_pre_init() local
570 struct rockchip_crtc *crtc = crtc_state->crtc; in display_pre_init()
576 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; in display_pre_init()
633 struct crtc_state *crtc_state = &state->crtc_state; in display_mode_valid() local
634 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_mode_valid()
655 struct crtc_state *crtc_state = &state->crtc_state; in display_mode_fixup() local
656 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_mode_fixup()
673 struct crtc_state *crtc_state = &state->crtc_state; in display_init() local
674 struct rockchip_crtc *crtc = crtc_state->crtc; in display_init()
702 if (crtc_state->crtc->active && !crtc_state->ports_node && in display_init()
703 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, in display_init()
706 crtc_state->dev->name, in display_init()
707 crtc_state->crtc->active_mode.type, in display_init()
708 crtc_state->crtc->active_mode.hdisplay, in display_init()
709 crtc_state->crtc->active_mode.vdisplay, in display_init()
710 crtc_state->crtc->active_mode.vrefresh); in display_init()
851 crtc_state->crtc->active = true; in display_init()
852 memcpy(&crtc_state->crtc->active_mode, in display_init()
864 struct crtc_state *crtc_state = &state->crtc_state; in display_send_mcu_cmd() local
865 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_send_mcu_cmd()
883 struct crtc_state *crtc_state = &state->crtc_state; in display_set_plane() local
884 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_set_plane()
902 struct crtc_state *crtc_state = &state->crtc_state; in display_enable() local
903 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_enable()
944 if (crtc_state->soft_te) in display_enable()
954 struct crtc_state *crtc_state = &state->crtc_state; in display_disable() local
955 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_disable()
982 struct crtc_state *crtc_state = &state->crtc_state; in display_check() local
983 const struct rockchip_crtc *crtc = crtc_state->crtc; in display_check()
1017 struct crtc_state *crtc_state = &state->crtc_state; in display_logo() local
1034 crtc_state->format = ROCKCHIP_FMT_RGB565; in display_logo()
1037 crtc_state->format = ROCKCHIP_FMT_RGB888; in display_logo()
1040 crtc_state->format = ROCKCHIP_FMT_ARGB8888; in display_logo()
1048 crtc_state->src_rect.w = logo->width; in display_logo()
1049 crtc_state->src_rect.h = logo->height; in display_logo()
1050 crtc_state->src_rect.x = 0; in display_logo()
1051 crtc_state->src_rect.y = 0; in display_logo()
1052 crtc_state->ymirror = logo->ymirror; in display_logo()
1053 crtc_state->rb_swap = 0; in display_logo()
1055 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; in display_logo()
1056 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; in display_logo()
1059 crtc_state->crtc_rect.x = 0; in display_logo()
1060 crtc_state->crtc_rect.y = 0; in display_logo()
1061 crtc_state->crtc_rect.w = hdisplay; in display_logo()
1062 crtc_state->crtc_rect.h = vdisplay; in display_logo()
1064 if (crtc_state->src_rect.w >= hdisplay) { in display_logo()
1065 crtc_state->crtc_rect.x = 0; in display_logo()
1066 crtc_state->crtc_rect.w = hdisplay; in display_logo()
1068 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; in display_logo()
1069 crtc_state->crtc_rect.w = crtc_state->src_rect.w; in display_logo()
1072 if (crtc_state->src_rect.h >= vdisplay) { in display_logo()
1073 crtc_state->crtc_rect.y = 0; in display_logo()
1074 crtc_state->crtc_rect.h = vdisplay; in display_logo()
1076 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; in display_logo()
1077 crtc_state->crtc_rect.h = crtc_state->src_rect.h; in display_logo()
1086 if (crtc_state->overscan_by_win_scale) { in display_logo()
1087 overscan_w = crtc_state->crtc_rect.w * (200 - overscan->left_margin * 2) / 200; in display_logo()
1088 overscan_h = crtc_state->crtc_rect.h * (200 - overscan->top_margin * 2) / 200; in display_logo()
1090 crtc_x = crtc_state->crtc_rect.x + overscan_w / 2; in display_logo()
1091 crtc_y = crtc_state->crtc_rect.y + overscan_h / 2; in display_logo()
1092 crtc_w = crtc_state->crtc_rect.w - overscan_w; in display_logo()
1093 crtc_h = crtc_state->crtc_rect.h - overscan_h; in display_logo()
1095 crtc_state->crtc_rect.x = crtc_x; in display_logo()
1096 crtc_state->crtc_rect.y = crtc_y; in display_logo()
1097 crtc_state->crtc_rect.w = crtc_w; in display_logo()
1098 crtc_state->crtc_rect.h = crtc_h; in display_logo()
1148 static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node, in get_crtc_mcu_mode() argument
1160 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); in get_crtc_mcu_mode()
1180 crtc_state->mcu_timing.mcu_pix_total = total_pixel; in get_crtc_mcu_mode()
1181 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; in get_crtc_mcu_mode()
1182 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; in get_crtc_mcu_mode()
1183 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; in get_crtc_mcu_mode()
1184 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; in get_crtc_mcu_mode()
1583 struct crtc_state *crtc_state = &state->crtc_state; in vidconsole_init() local
1592 crtc_state->format = ROCKCHIP_FMT_RGB565; in vidconsole_init()
1595 crtc_state->format = ROCKCHIP_FMT_RGB888; in vidconsole_init()
1598 crtc_state->format = ROCKCHIP_FMT_ARGB8888; in vidconsole_init()
1605 crtc_state->src_rect.w = uc_priv->xsize; in vidconsole_init()
1606 crtc_state->src_rect.h = uc_priv->ysize; in vidconsole_init()
1607 crtc_state->src_rect.x = 0; in vidconsole_init()
1608 crtc_state->src_rect.y = 0; in vidconsole_init()
1610 crtc_state->crtc_rect.w = conn_state->mode.crtc_hdisplay; in vidconsole_init()
1611 crtc_state->crtc_rect.h = conn_state->mode.crtc_vdisplay; in vidconsole_init()
1612 crtc_state->crtc_rect.x = 0; in vidconsole_init()
1613 crtc_state->crtc_rect.y = 0; in vidconsole_init()
1615 crtc_state->dma_addr = (u32)plat->base; in vidconsole_init()
1616 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * DRM_ROCKCHIP_FB_BPP, 32) >> 5; in vidconsole_init()
1623 if (crtc_state->overscan_by_win_scale) { in vidconsole_init()
1624 overscan_w = crtc_state->crtc_rect.w * (200 - overscan->left_margin * 2) / 200; in vidconsole_init()
1625 overscan_h = crtc_state->crtc_rect.h * (200 - overscan->top_margin * 2) / 200; in vidconsole_init()
1627 crtc_x = crtc_state->crtc_rect.x + overscan_w / 2; in vidconsole_init()
1628 crtc_y = crtc_state->crtc_rect.y + overscan_h / 2; in vidconsole_init()
1629 crtc_w = crtc_state->crtc_rect.w - overscan_w; in vidconsole_init()
1630 crtc_h = crtc_state->crtc_rect.h - overscan_h; in vidconsole_init()
1632 crtc_state->crtc_rect.x = crtc_x; in vidconsole_init()
1633 crtc_state->crtc_rect.y = crtc_y; in vidconsole_init()
1634 crtc_state->crtc_rect.w = crtc_w; in vidconsole_init()
1635 crtc_state->crtc_rect.h = crtc_h; in vidconsole_init()
1795 struct crtc_state *crtc_state; in rockchip_vop_dump() local
1803 crtc_state = &state->crtc_state; in rockchip_vop_dump()
1804 crtc = crtc_state->crtc; in rockchip_vop_dump()
2475 s->crtc_state.node = np_to_ofnode(vop_node); in rockchip_display_probe()
2476 s->crtc_state.port_node = port_node; in rockchip_display_probe()
2477 s->crtc_state.dev = crtc_dev; in rockchip_display_probe()
2478 s->crtc_state.crtc = crtc; in rockchip_display_probe()
2479 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); in rockchip_display_probe()
2486 s->crtc_state.ports_node = port_parent_node; in rockchip_display_probe()
2495 s->crtc_state.crtc->vps[vp_id].xmirror_en = in rockchip_display_probe()
2498 s->crtc_state.crtc->vps[vp_id].sharp_en = in rockchip_display_probe()
2501 s->crtc_state.crtc->vps[vp_id].primary_plane_id = -1; in rockchip_display_probe()
2507 s->crtc_state.crtc->vps[vp_id].cursor_plane_id = in rockchip_display_probe()
2510 s->crtc_state.crtc->vps[vp_id].plane_mask = in rockchip_display_probe()
2512 if (s->crtc_state.crtc->vps[vp_id].plane_mask) { in rockchip_display_probe()
2513 s->crtc_state.crtc->assign_plane |= true; in rockchip_display_probe()
2514 s->crtc_state.crtc->vps[vp_id].primary_plane_id = in rockchip_display_probe()
2518 s->crtc_state.crtc->vps[vp_id].plane_mask, in rockchip_display_probe()
2519 (int8_t)s->crtc_state.crtc->vps[vp_id].primary_plane_id, in rockchip_display_probe()
2520 (int8_t)s->crtc_state.crtc->vps[vp_id].cursor_plane_id); in rockchip_display_probe()
2527 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; in rockchip_display_probe()
2533 get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node); in rockchip_display_probe()
2535 ret = ofnode_read_u32_default(s->crtc_state.node, in rockchip_display_probe()
2537 s->crtc_state.dual_channel_swap = ret; in rockchip_display_probe()
2588 s->crtc_state.crtc_id); in rockchip_display_fixup()
2647 if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane) in rockchip_display_fixup()
2648 s->crtc_state.crtc->funcs->fixup_dts(s, blob); in rockchip_display_fixup()
2662 crtc = s->crtc_state.crtc; in rockchip_display_fixup()
2700 FDT_SET_U32("overscan,win_scale", s->crtc_state.overscan_by_win_scale); in rockchip_display_fixup()
2738 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); in rockchip_display_fixup()