62 	u32 postdiv1, fbdiv, dsmpd, postdiv2, refdiv, frac, bypass;  in rk628_cru_clk_get_rate_pll()  local
103 	refdiv = (con1 & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;  in rk628_cru_clk_get_rate_pll()
110 	do_div(foutvco, refdiv);  in rk628_cru_clk_get_rate_pll()
115 		do_div(frac_rate, refdiv);  in rk628_cru_clk_get_rate_pll()
132 	u8 dsmpd = 1, postdiv1 = 0, postdiv2 = 0, refdiv = 0;  in rk628_cru_clk_set_rate_pll()  local
201 	for (refdiv = min_refdiv; refdiv <= max_refdiv; refdiv++) {  in rk628_cru_clk_set_rate_pll()
204 		if (fin % refdiv)  in rk628_cru_clk_set_rate_pll()
207 		tmp = (u64)fout * refdiv;  in rk628_cru_clk_set_rate_pll()
214 		do_div(tmp, refdiv);  in rk628_cru_clk_set_rate_pll()
221 			tmp = (u64)frac_rate * refdiv;  in rk628_cru_clk_set_rate_pll()
241 	do_div(foutvco, refdiv);  in rk628_cru_clk_set_rate_pll()
246 		do_div(frac_rate, refdiv);  in rk628_cru_clk_set_rate_pll()
259 			PLL_REFDIV(refdiv));  in rk628_cru_clk_set_rate_pll()