299 	u32 mux, div = 0;  in rk628_cru_clk_get_rate_sclk_vop()  local
309 	rk628_i2c_read(rk628, CRU_CLKSEL_CON13, &div);  in rk628_cru_clk_get_rate_sclk_vop()
310 	m = div >> 16 & 0xffff;  in rk628_cru_clk_get_rate_sclk_vop()
311 	n = div & 0xffff;  in rk628_cru_clk_get_rate_sclk_vop()
320 	u32 mux = 0, div = 0;  in rk628_cru_clk_get_rate_clk_imodet()  local
330 	rk628_i2c_read(rk628, CRU_CLKSEL_CON05, &div);  in rk628_cru_clk_get_rate_clk_imodet()
331 	n = div & 0x1f;  in rk628_cru_clk_get_rate_clk_imodet()
362 	u32 mux, div = 0;  in rk628_cru_clk_get_rate_uart_src()  local
371 	rk628_i2c_read(rk628, CRU_CLKSEL_CON21, &div);  in rk628_cru_clk_get_rate_uart_src()
372 	div &= CLK_UART_SRC_DIV_MASK;  in rk628_cru_clk_get_rate_uart_src()
373 	div >>= CLK_UART_SRC_DIV_SHIFT;  in rk628_cru_clk_get_rate_uart_src()
374 	rate = parent_rate / (div + 1);  in rk628_cru_clk_get_rate_uart_src()
410 	u8 div;  in rk628_cru_clk_set_rate_sclk_hdmirx_aud()  local
416 	div = DIV_ROUND_CLOSEST(parent_rate, rate);  in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
417 	do_div(parent_rate, div);  in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
420 		rk628_i2c_write(rk628, CRU_CLKSEL_CON05, CLK_HDMIRX_AUD_DIV(div - 1) |  in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
423 		rk628_i2c_write(rk628, CRU_CLKSEL_CON05, CLK_HDMIRX_AUD_DIV(div - 1) |  in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
432 	u8 div = 0;  in rk628_cru_clk_get_rate_sclk_hdmirx_aud()  local
436 	div = ((val & CLK_HDMIRX_AUD_DIV_MASK) >> 6) + 1;  in rk628_cru_clk_get_rate_sclk_hdmirx_aud()
447 	do_div(parent_rate, div);  in rk628_cru_clk_get_rate_sclk_hdmirx_aud()
472 	u32 div;  in rk628_cru_clk_set_rate_bt1120_dec()  local
475 	div = DIV_ROUND_UP(parent_rate, rate);  in rk628_cru_clk_set_rate_bt1120_dec()
476 	rk628_i2c_write(rk628, CRU_CLKSEL_CON02, CLK_BT1120DEC_DIV(div-1));  in rk628_cru_clk_set_rate_bt1120_dec()
478 	return parent_rate / div;  in rk628_cru_clk_set_rate_bt1120_dec()
484 	u32 div = 0;  in rk628_cru_clk_get_rate_bt1120_dec()  local
488 	rk628_i2c_read(rk628, CRU_CLKSEL_CON02, &div);  in rk628_cru_clk_get_rate_bt1120_dec()
489 	div = (div & 0x1f) + 1;  in rk628_cru_clk_get_rate_bt1120_dec()
491 	return parent_rate / div;  in rk628_cru_clk_get_rate_bt1120_dec()