256 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)  in dsi_write()  function
274 	dsi_write(dsi, reg, tmp);  in dsi_update_bits()
835 			dsi_write(dsi, DSI_GEN_PLD_DATA, val);  in dw_mipi_dsi_transfer()
839 			dsi_write(dsi, DSI_GEN_PLD_DATA, val);  in dw_mipi_dsi_transfer()
851 	dsi_write(dsi, DSI_GEN_HDR, val);  in dw_mipi_dsi_transfer()
890 	dsi_write(dsi, DSI_VID_MODE_CFG, val);  in dw_mipi_dsi_video_mode_config()
904 	dsi_write(dsi, DSI_PWR_UP, RESET);  in dw_mipi_dsi_enable()
909 		dsi_write(dsi, DSI_DBI_VCID, DBI_VCID(dsi->channel));  in dw_mipi_dsi_enable()
911 		dsi_write(dsi, DSI_EDPI_CMD_SIZE, mode->hdisplay);  in dw_mipi_dsi_enable()
916 	dsi_write(dsi, DSI_PWR_UP, POWERUP);  in dw_mipi_dsi_enable()
924 	dsi_write(dsi, DSI_PWR_UP, RESET);  in dw_mipi_dsi_disable()
925 	dsi_write(dsi, DSI_LPCLK_CTRL, 0);  in dw_mipi_dsi_disable()
926 	dsi_write(dsi, DSI_EDPI_CMD_SIZE, 0);  in dw_mipi_dsi_disable()
928 	dsi_write(dsi, DSI_PWR_UP, POWERUP);  in dw_mipi_dsi_disable()
942 	dsi_write(dsi, DSI_PWR_UP, RESET);  in dw_mipi_dsi_post_disable()
943 	dsi_write(dsi, DSI_PHY_RSTZ, 0);  in dw_mipi_dsi_post_disable()
958 	dsi_write(dsi, DSI_PWR_UP, RESET);  in dw_mipi_dsi_init()
962 	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |  in dw_mipi_dsi_init()
991 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));  in dw_mipi_dsi_dpi_config()
992 	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);  in dw_mipi_dsi_dpi_config()
993 	dsi_write(dsi, DSI_DPI_CFG_POL, val);  in dw_mipi_dsi_dpi_config()
994 	dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(4)  in dw_mipi_dsi_dpi_config()
1005 	dsi_write(dsi, DSI_PCKHDL_CFG, val);  in dw_mipi_dsi_packet_handler_config()
1011 	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));  in dw_mipi_dsi_video_packet_config()
1016 	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));  in dw_mipi_dsi_command_mode_config()
1017 	dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);  in dw_mipi_dsi_command_mode_config()
1044 	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);  in dw_mipi_dsi_line_timer_config()
1047 	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);  in dw_mipi_dsi_line_timer_config()
1050 	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);  in dw_mipi_dsi_line_timer_config()
1063 	dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive);  in dw_mipi_dsi_vertical_timing_config()
1064 	dsi_write(dsi, DSI_VID_VSA_LINES, vsa);  in dw_mipi_dsi_vertical_timing_config()
1065 	dsi_write(dsi, DSI_VID_VFP_LINES, vfp);  in dw_mipi_dsi_vertical_timing_config()
1066 	dsi_write(dsi, DSI_VID_VBP_LINES, vbp);  in dw_mipi_dsi_vertical_timing_config()
1071 	dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x14)  in dw_mipi_dsi_dphy_timing_config()
1074 	dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40)  in dw_mipi_dsi_dphy_timing_config()
1080 	dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) |  in dw_mipi_dsi_dphy_interface_config()
1088 	dsi_write(dsi, DSI_INT_MSK0, 0);  in dw_mipi_dsi_clear_err()
1089 	dsi_write(dsi, DSI_INT_MSK1, 0);  in dw_mipi_dsi_clear_err()
1261 	dsi_write(dsi, DSI_PWR_UP, POWERUP);  in dw_mipi_dsi_pre_enable()