Lines Matching refs:GRF_REG_FIELD
199 #define GRF_REG_FIELD(reg, lsb, msb) (((reg) << 10) | ((lsb) << 5) | (msb)) macro
1368 [DPIUPDATECFG] = GRF_REG_FIELD(0x0434, 7, 7),
1369 [DPICOLORM] = GRF_REG_FIELD(0x0434, 3, 3),
1370 [DPISHUTDN] = GRF_REG_FIELD(0x0434, 2, 2),
1371 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0438, 7, 10),
1372 [TURNDISABLE] = GRF_REG_FIELD(0x0438, 5, 5),
1373 [VOPSEL] = GRF_REG_FIELD(0x0438, 0, 0),
1382 [MASTERSLAVEZ] = GRF_REG_FIELD(0x0440, 8, 8),
1383 [DPIUPDATECFG] = GRF_REG_FIELD(0x0440, 7, 7),
1384 [DPICOLORM] = GRF_REG_FIELD(0x0440, 3, 3),
1385 [DPISHUTDN] = GRF_REG_FIELD(0x0440, 2, 2),
1386 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0444, 7, 10),
1387 [FORCERXMODE] = GRF_REG_FIELD(0x0444, 6, 6),
1388 [TURNDISABLE] = GRF_REG_FIELD(0x0444, 5, 5),
1397 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0150, 10, 13),
1398 [FORCERXMODE] = GRF_REG_FIELD(0x0150, 9, 9),
1399 [TURNDISABLE] = GRF_REG_FIELD(0x0150, 8, 8),
1400 [DPICOLORM] = GRF_REG_FIELD(0x0150, 5, 5),
1401 [DPISHUTDN] = GRF_REG_FIELD(0x0150, 4, 4),
1410 [DPICOLORM] = GRF_REG_FIELD(0x025c, 8, 8),
1411 [DPISHUTDN] = GRF_REG_FIELD(0x025c, 7, 7),
1412 [VOPSEL] = GRF_REG_FIELD(0x025c, 6, 6),
1413 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0264, 8, 11),
1414 [FORCERXMODE] = GRF_REG_FIELD(0x0264, 4, 7),
1415 [TURNDISABLE] = GRF_REG_FIELD(0x0264, 0, 3),
1416 [TURNREQUEST] = GRF_REG_FIELD(0x03a4, 8, 10),
1417 [DPIUPDATECFG] = GRF_REG_FIELD(0x03a8, 0, 0),
1421 [DPICOLORM] = GRF_REG_FIELD(0x025c, 11, 11),
1422 [DPISHUTDN] = GRF_REG_FIELD(0x025c, 10, 10),
1423 [VOPSEL] = GRF_REG_FIELD(0x025c, 9, 9),
1424 [ENABLE_N] = GRF_REG_FIELD(0x0268, 12, 15),
1425 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0268, 8, 11),
1426 [FORCERXMODE] = GRF_REG_FIELD(0x0268, 4, 7),
1427 [TURNDISABLE] = GRF_REG_FIELD(0x0268, 0, 3),
1428 [BASEDIR] = GRF_REG_FIELD(0x027c, 15, 15),
1429 [MASTERSLAVEZ] = GRF_REG_FIELD(0x027c, 14, 14),
1430 [ENABLECLK] = GRF_REG_FIELD(0x027c, 12, 12),
1431 [TURNREQUEST] = GRF_REG_FIELD(0x03a4, 4, 7),
1432 [DPIUPDATECFG] = GRF_REG_FIELD(0x03a8, 1, 1),
1442 [VOPSEL] = GRF_REG_FIELD(0x0400, 2, 2),
1443 [DPIUPDATECFG] = GRF_REG_FIELD(0x0410, 9, 9),
1444 [DPICOLORM] = GRF_REG_FIELD(0x0410, 3, 3),
1445 [DPISHUTDN] = GRF_REG_FIELD(0x0410, 2, 2),
1446 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0414, 7, 10),
1447 [FORCERXMODE] = GRF_REG_FIELD(0x0414, 6, 6),
1448 [TURNDISABLE] = GRF_REG_FIELD(0x0414, 5, 5),
1457 [DPIUPDATECFG] = GRF_REG_FIELD(0x0418, 7, 7),
1458 [DPICOLORM] = GRF_REG_FIELD(0x0418, 3, 3),
1459 [DPISHUTDN] = GRF_REG_FIELD(0x0418, 2, 2),
1460 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x041c, 7, 10),
1461 [FORCERXMODE] = GRF_REG_FIELD(0x041c, 6, 6),
1462 [TURNDISABLE] = GRF_REG_FIELD(0x041c, 5, 5),
1471 [DPIUPDATECFG] = GRF_REG_FIELD(0x6224, 15, 15),
1472 [DPISHUTDN] = GRF_REG_FIELD(0x6224, 14, 14),
1473 [DPICOLORM] = GRF_REG_FIELD(0x6224, 13, 13),
1474 [VOPSEL] = GRF_REG_FIELD(0x6250, 0, 0),
1475 [TURNREQUEST] = GRF_REG_FIELD(0x6258, 12, 15),
1476 [TURNDISABLE] = GRF_REG_FIELD(0x6258, 8, 11),
1477 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x6258, 4, 7),
1478 [FORCERXMODE] = GRF_REG_FIELD(0x6258, 0, 3),
1482 [VOPSEL] = GRF_REG_FIELD(0x6250, 4, 4),
1483 [DPIUPDATECFG] = GRF_REG_FIELD(0x6250, 3, 3),
1484 [DPISHUTDN] = GRF_REG_FIELD(0x6250, 2, 2),
1485 [DPICOLORM] = GRF_REG_FIELD(0x6250, 1, 1),
1486 [TURNDISABLE] = GRF_REG_FIELD(0x625c, 12, 15),
1487 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x625c, 8, 11),
1488 [FORCERXMODE] = GRF_REG_FIELD(0x625c, 4, 7),
1489 [ENABLE_N] = GRF_REG_FIELD(0x625c, 0, 3),
1490 [MASTERSLAVEZ] = GRF_REG_FIELD(0x6260, 7, 7),
1491 [ENABLECLK] = GRF_REG_FIELD(0x6260, 6, 6),
1492 [BASEDIR] = GRF_REG_FIELD(0x6260, 5, 5),
1493 [TURNREQUEST] = GRF_REG_FIELD(0x6260, 0, 3),
1503 [DPIUPDATECFG] = GRF_REG_FIELD(0x0014, 2, 2),
1504 [DPICOLORM] = GRF_REG_FIELD(0x0014, 1, 1),
1505 [DPISHUTDN] = GRF_REG_FIELD(0x0014, 0, 0),
1506 [SKEWCALHS] = GRF_REG_FIELD(0x0018, 11, 15),
1507 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0018, 4, 7),
1508 [TURNDISABLE] = GRF_REG_FIELD(0x0018, 2, 2),
1509 [FORCERXMODE] = GRF_REG_FIELD(0x0018, 0, 0),
1510 [ENABLE_N] = GRF_REG_FIELD(0x0018, 8, 9),
1519 [DPIUPDATECFG] = GRF_REG_FIELD(0x05d0, 2, 2),
1520 [DPICOLORM] = GRF_REG_FIELD(0x05d0, 1, 1),
1521 [DPISHUTDN] = GRF_REG_FIELD(0x05d0, 0, 0),
1522 [SKEWCALHS] = GRF_REG_FIELD(0x05d4, 11, 15),
1523 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x05d4, 4, 7),
1524 [TURNDISABLE] = GRF_REG_FIELD(0x05d4, 2, 2),
1525 [FORCERXMODE] = GRF_REG_FIELD(0x05d4, 0, 0),
1534 [DPIUPDATECFG] = GRF_REG_FIELD(0x0360, 2, 2),
1535 [DPICOLORM] = GRF_REG_FIELD(0x0360, 1, 1),
1536 [DPISHUTDN] = GRF_REG_FIELD(0x0360, 0, 0),
1537 [SKEWCALHS] = GRF_REG_FIELD(0x0368, 11, 15),
1538 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0368, 4, 7),
1539 [TURNDISABLE] = GRF_REG_FIELD(0x0368, 2, 2),
1540 [FORCERXMODE] = GRF_REG_FIELD(0x0368, 0, 0),
1544 [DPIUPDATECFG] = GRF_REG_FIELD(0x0360, 10, 10),
1545 [DPICOLORM] = GRF_REG_FIELD(0x0360, 9, 9),
1546 [DPISHUTDN] = GRF_REG_FIELD(0x0360, 8, 8),
1547 [SKEWCALHS] = GRF_REG_FIELD(0x036c, 11, 15),
1548 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x036c, 4, 7),
1549 [TURNDISABLE] = GRF_REG_FIELD(0x036c, 2, 2),
1550 [FORCERXMODE] = GRF_REG_FIELD(0x036c, 0, 0),
1560 [DPICOLORM] = GRF_REG_FIELD(0x0410, 7, 7),
1561 [DPISHUTDN] = GRF_REG_FIELD(0x0410, 6, 6),
1562 [DPIUPDATECFG] = GRF_REG_FIELD(0x0410, 8, 8),
1563 [FORCERXMODE] = GRF_REG_FIELD(0x0414, 5, 5),
1564 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0414, 6, 9),
1565 [TURNDISABLE] = GRF_REG_FIELD(0x0414, 4, 4),
1574 [DPIUPDATECFG] = GRF_REG_FIELD(0x0008, 5, 5),
1575 [DPISHUTDN] = GRF_REG_FIELD(0x0008, 4, 4),
1576 [DPICOLORM] = GRF_REG_FIELD(0x0008, 3, 3),
1577 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x10220, 4, 7),
1578 [TURNDISABLE] = GRF_REG_FIELD(0x10220, 2, 2),
1579 [FORCERXMODE] = GRF_REG_FIELD(0x10220, 0, 0),
1588 [DPIUPDATECFG] = GRF_REG_FIELD(0x8000c, 3, 3),
1589 [DPICOLORM] = GRF_REG_FIELD(0x8000c, 1, 1),
1590 [DPISHUTDN] = GRF_REG_FIELD(0x8000c, 0, 0),
1591 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x80010, 4, 7),
1592 [TURNDISABLE] = GRF_REG_FIELD(0x80010, 2, 2),
1593 [FORCERXMODE] = GRF_REG_FIELD(0x80010, 0, 0),