Lines Matching refs:dp
334 static int dw_dp_aux_write_data(struct dw_dp *dp, const u8 *buffer, size_t size) in dw_dp_aux_write_data() argument
345 regmap_write(dp->regmap, DPTX_AUX_DATA0 + i * 4, value); in dw_dp_aux_write_data()
351 static int dw_dp_aux_read_data(struct dw_dp *dp, u8 *buffer, size_t size) in dw_dp_aux_read_data() argument
359 regmap_read(dp->regmap, DPTX_AUX_DATA0 + i * 4, &value); in dw_dp_aux_read_data()
374 struct dw_dp *dp = dev_get_priv(aux->dev); in dw_dp_aux_transfer() local
383 ret = dw_dp_aux_write_data(dp, msg->buffer, msg->size); in dw_dp_aux_transfer()
401 regmap_write(dp->regmap, DPTX_AUX_CMD, value); in dw_dp_aux_transfer()
403 timeout = regmap_read_poll_timeout(dp->regmap, DPTX_GENERAL_INTERRUPT, in dw_dp_aux_transfer()
411 regmap_write(dp->regmap, DPTX_GENERAL_INTERRUPT, AUX_REPLY_EVENT); in dw_dp_aux_transfer()
413 regmap_read(dp->regmap, DPTX_AUX_STATUS, &value); in dw_dp_aux_transfer()
430 ret = dw_dp_aux_read_data(dp, msg->buffer, count); in dw_dp_aux_transfer()
439 static bool dw_dp_bandwidth_ok(struct dw_dp *dp, in dw_dp_bandwidth_ok() argument
453 static void dw_dp_hpd_init(struct dw_dp *dp) in dw_dp_hpd_init() argument
455 if (dm_gpio_is_valid(&dp->hpd_gpio) || dp->force_hpd) { in dw_dp_hpd_init()
456 regmap_update_bits(dp->regmap, DPTX_CCTL, FORCE_HPD, in dw_dp_hpd_init()
462 regmap_update_bits(dp->regmap, DPTX_HPD_INTERRUPT_ENABLE, in dw_dp_hpd_init()
469 regmap_update_bits(dp->regmap, DPTX_GENERAL_INTERRUPT_ENABLE, in dw_dp_hpd_init()
473 static void dw_dp_aux_init(struct dw_dp *dp) in dw_dp_aux_init() argument
475 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, AUX_RESET, in dw_dp_aux_init()
478 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, AUX_RESET, in dw_dp_aux_init()
481 regmap_update_bits(dp->regmap, DPTX_GENERAL_INTERRUPT_ENABLE, in dw_dp_aux_init()
486 static void dw_dp_init(struct dw_dp *dp) in dw_dp_init() argument
488 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, CONTROLLER_RESET, in dw_dp_init()
491 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, CONTROLLER_RESET, in dw_dp_init()
494 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, PHY_SOFT_RESET, in dw_dp_init()
497 regmap_update_bits(dp->regmap, DPTX_SOFT_RESET_CTRL, PHY_SOFT_RESET, in dw_dp_init()
500 regmap_update_bits(dp->regmap, DPTX_CCTL, DEFAULT_FAST_LINK_TRAIN_EN, in dw_dp_init()
503 dw_dp_hpd_init(dp); in dw_dp_init()
504 dw_dp_aux_init(dp); in dw_dp_init()
507 static void dw_dp_phy_set_pattern(struct dw_dp *dp, u32 pattern) in dw_dp_phy_set_pattern() argument
509 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, TPS_SEL, in dw_dp_phy_set_pattern()
513 static void dw_dp_phy_xmit_enable(struct dw_dp *dp, u32 lanes) in dw_dp_phy_xmit_enable() argument
529 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, XMIT_ENABLE, in dw_dp_phy_xmit_enable()
533 static int dw_dp_link_power_up(struct dw_dp *dp) in dw_dp_link_power_up() argument
535 struct dw_dp_link *link = &dp->link; in dw_dp_link_power_up()
542 ret = drm_dp_dpcd_readb(&dp->aux, DP_SET_POWER, &value); in dw_dp_link_power_up()
549 ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, value); in dw_dp_link_power_up()
557 static int dw_dp_link_probe(struct dw_dp *dp) in dw_dp_link_probe() argument
559 struct dw_dp_link *link = &dp->link; in dw_dp_link_probe()
563 drm_dp_dpcd_writeb(&dp->aux, DP_MSTM_CTRL, 0); in dw_dp_link_probe()
564 ret = drm_dp_read_dpcd_caps(&dp->aux, link->dpcd); in dw_dp_link_probe()
568 ret = drm_dp_dpcd_readb(&dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, in dw_dp_link_probe()
577 link->rate = min_t(u32, min(dp->max_link_rate, dp->phy.attrs.max_link_rate * 100), in dw_dp_link_probe()
579 link->lanes = min_t(u8, dp->phy.attrs.bus_width, in dw_dp_link_probe()
592 static int dw_dp_link_train_update_vs_emph(struct dw_dp *dp) in dw_dp_link_train_update_vs_emph() argument
594 struct dw_dp_link *link = &dp->link; in dw_dp_link_train_update_vs_emph()
605 phy_cfg.dp.voltage[i] = vs[i]; in dw_dp_link_train_update_vs_emph()
606 phy_cfg.dp.pre[i] = pe[i]; in dw_dp_link_train_update_vs_emph()
608 phy_cfg.dp.lanes = lanes; in dw_dp_link_train_update_vs_emph()
609 phy_cfg.dp.link_rate = link->rate / 100; in dw_dp_link_train_update_vs_emph()
610 phy_cfg.dp.set_lanes = false; in dw_dp_link_train_update_vs_emph()
611 phy_cfg.dp.set_rate = false; in dw_dp_link_train_update_vs_emph()
612 phy_cfg.dp.set_voltages = true; in dw_dp_link_train_update_vs_emph()
613 ret = generic_phy_configure(&dp->phy, &phy_cfg); in dw_dp_link_train_update_vs_emph()
620 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, lanes); in dw_dp_link_train_update_vs_emph()
627 static int dw_dp_link_configure(struct dw_dp *dp) in dw_dp_link_configure() argument
629 struct dw_dp_link *link = &dp->link; in dw_dp_link_configure()
635 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_POWERDOWN, in dw_dp_link_configure()
638 phy_cfg.dp.lanes = link->lanes; in dw_dp_link_configure()
639 phy_cfg.dp.link_rate = link->rate / 100; in dw_dp_link_configure()
640 phy_cfg.dp.ssc = link->caps.ssc; in dw_dp_link_configure()
641 phy_cfg.dp.set_lanes = true; in dw_dp_link_configure()
642 phy_cfg.dp.set_rate = true; in dw_dp_link_configure()
643 phy_cfg.dp.set_voltages = false; in dw_dp_link_configure()
644 ret = generic_phy_configure(&dp->phy, &phy_cfg); in dw_dp_link_configure()
648 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_LANES, in dw_dp_link_configure()
666 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_RATE, in dw_dp_link_configure()
670 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_POWERDOWN, in dw_dp_link_configure()
673 dw_dp_phy_xmit_enable(dp, link->lanes); in dw_dp_link_configure()
680 regmap_update_bits(dp->regmap, DPTX_CCTL, ENHANCE_FRAMING_EN, in dw_dp_link_configure()
683 regmap_update_bits(dp->regmap, DPTX_CCTL, ENHANCE_FRAMING_EN, in dw_dp_link_configure()
687 ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, sizeof(buf)); in dw_dp_link_configure()
694 ret = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, in dw_dp_link_configure()
720 static int dw_dp_link_train_set_pattern(struct dw_dp *dp, u32 pattern) in dw_dp_link_train_set_pattern() argument
728 regmap_update_bits(dp->regmap, DPTX_CCTL, SCRAMBLE_DIS, in dw_dp_link_train_set_pattern()
731 regmap_update_bits(dp->regmap, DPTX_CCTL, SCRAMBLE_DIS, in dw_dp_link_train_set_pattern()
737 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_NONE); in dw_dp_link_train_set_pattern()
740 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_TPS_1); in dw_dp_link_train_set_pattern()
743 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_TPS_2); in dw_dp_link_train_set_pattern()
746 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_TPS_3); in dw_dp_link_train_set_pattern()
749 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_TPS_4); in dw_dp_link_train_set_pattern()
755 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in dw_dp_link_train_set_pattern()
795 static int dw_dp_link_clock_recovery(struct dw_dp *dp) in dw_dp_link_clock_recovery() argument
797 struct dw_dp_link *link = &dp->link; in dw_dp_link_clock_recovery()
802 ret = dw_dp_link_train_set_pattern(dp, DP_TRAINING_PATTERN_1); in dw_dp_link_clock_recovery()
807 ret = dw_dp_link_train_update_vs_emph(dp); in dw_dp_link_clock_recovery()
813 ret = drm_dp_dpcd_read_link_status(&dp->aux, status); in dw_dp_link_clock_recovery()
815 dev_err(dp->dev, "failed to read link status: %d\n", in dw_dp_link_clock_recovery()
842 static int dw_dp_link_channel_equalization(struct dw_dp *dp) in dw_dp_link_channel_equalization() argument
844 struct dw_dp_link *link = &dp->link; in dw_dp_link_channel_equalization()
855 ret = dw_dp_link_train_set_pattern(dp, pattern); in dw_dp_link_channel_equalization()
860 ret = dw_dp_link_train_update_vs_emph(dp); in dw_dp_link_channel_equalization()
866 ret = drm_dp_dpcd_read_link_status(&dp->aux, status); in dw_dp_link_channel_equalization()
871 dev_err(dp->dev, in dw_dp_link_channel_equalization()
889 static int dw_dp_link_downgrade(struct dw_dp *dp) in dw_dp_link_downgrade() argument
891 struct dw_dp_link *link = &dp->link; in dw_dp_link_downgrade()
892 struct dw_dp_video *video = &dp->video; in dw_dp_link_downgrade()
908 if (!dw_dp_bandwidth_ok(dp, &video->mode, video->bpp, link->lanes, in dw_dp_link_downgrade()
915 static int dw_dp_link_train(struct dw_dp *dp) in dw_dp_link_train() argument
917 struct dw_dp_link *link = &dp->link; in dw_dp_link_train()
926 ret = dw_dp_link_configure(dp); in dw_dp_link_train()
928 dev_err(dp->dev, "failed to configure DP link: %d\n", ret); in dw_dp_link_train()
932 ret = dw_dp_link_clock_recovery(dp); in dw_dp_link_train()
934 dev_err(dp->dev, "clock recovery failed: %d\n", ret); in dw_dp_link_train()
939 dev_err(dp->dev, "clock recovery failed, downgrading link\n"); in dw_dp_link_train()
941 ret = dw_dp_link_downgrade(dp); in dw_dp_link_train()
950 ret = dw_dp_link_channel_equalization(dp); in dw_dp_link_train()
952 dev_err(dp->dev, "channel equalization failed: %d\n", ret); in dw_dp_link_train()
957 dev_err(dp->dev, in dw_dp_link_train()
960 ret = dw_dp_link_downgrade(dp); in dw_dp_link_train()
970 dw_dp_link_train_set_pattern(dp, DP_TRAINING_PATTERN_DISABLE); in dw_dp_link_train()
974 static int dw_dp_link_enable(struct dw_dp *dp) in dw_dp_link_enable() argument
978 ret = dw_dp_link_power_up(dp); in dw_dp_link_enable()
982 ret = dw_dp_link_train(dp); in dw_dp_link_enable()
984 dev_err(dp->dev, "link training failed: %d\n", ret); in dw_dp_link_enable()
991 static int dw_dp_set_phy_default_config(struct dw_dp *dp) in dw_dp_set_phy_default_config() argument
993 struct dw_dp_link *link = &dp->link; in dw_dp_set_phy_default_config()
999 link->lanes = dp->phy.attrs.bus_width; in dw_dp_set_phy_default_config()
1006 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_POWERDOWN, in dw_dp_set_phy_default_config()
1010 phy_cfg.dp.voltage[i] = 3; in dw_dp_set_phy_default_config()
1011 phy_cfg.dp.pre[i] = 0; in dw_dp_set_phy_default_config()
1013 phy_cfg.dp.lanes = link->lanes; in dw_dp_set_phy_default_config()
1014 phy_cfg.dp.link_rate = link->rate / 100; in dw_dp_set_phy_default_config()
1015 phy_cfg.dp.ssc = link->caps.ssc; in dw_dp_set_phy_default_config()
1016 phy_cfg.dp.set_lanes = true; in dw_dp_set_phy_default_config()
1017 phy_cfg.dp.set_rate = true; in dw_dp_set_phy_default_config()
1018 phy_cfg.dp.set_voltages = true; in dw_dp_set_phy_default_config()
1019 ret = generic_phy_configure(&dp->phy, &phy_cfg); in dw_dp_set_phy_default_config()
1023 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_LANES, in dw_dp_set_phy_default_config()
1041 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_RATE, in dw_dp_set_phy_default_config()
1045 regmap_update_bits(dp->regmap, DPTX_PHYIF_CTRL, PHY_POWERDOWN, in dw_dp_set_phy_default_config()
1048 dw_dp_phy_xmit_enable(dp, link->lanes); in dw_dp_set_phy_default_config()
1050 regmap_update_bits(dp->regmap, DPTX_CCTL, ENHANCE_FRAMING_EN, in dw_dp_set_phy_default_config()
1053 dw_dp_phy_set_pattern(dp, DPTX_PHY_PATTERN_NONE); in dw_dp_set_phy_default_config()
1057 static int dw_dp_send_sdp(struct dw_dp *dp, struct dw_dp_sdp *sdp) in dw_dp_send_sdp() argument
1066 regmap_write(dp->regmap, reg, get_unaligned_le32(&sdp->header)); in dw_dp_send_sdp()
1070 regmap_write(dp->regmap, reg + i * 4, in dw_dp_send_sdp()
1074 regmap_update_bits(dp->regmap, DPTX_SDP_VERTICAL_CTRL, in dw_dp_send_sdp()
1079 regmap_update_bits(dp->regmap, DPTX_SDP_HORIZONTAL_CTRL, in dw_dp_send_sdp()
1123 static int dw_dp_send_vsc_sdp(struct dw_dp *dp) in dw_dp_send_vsc_sdp() argument
1125 struct dw_dp_video *video = &dp->video; in dw_dp_send_vsc_sdp()
1159 return dw_dp_send_sdp(dp, &sdp); in dw_dp_send_vsc_sdp()
1162 static int dw_dp_video_set_pixel_mode(struct dw_dp *dp, u8 pixel_mode) in dw_dp_video_set_pixel_mode() argument
1173 regmap_update_bits(dp->regmap, DPTX_VSAMPLE_CTRL, PIXEL_MODE_SELECT, in dw_dp_video_set_pixel_mode()
1179 static int dw_dp_video_set_msa(struct dw_dp *dp, u8 color_format, u8 bpc, in dw_dp_video_set_msa() argument
1182 struct dw_dp_link *link = &dp->link; in dw_dp_video_set_msa()
1224 regmap_write(dp->regmap, DPTX_VIDEO_MSA1, in dw_dp_video_set_msa()
1226 regmap_write(dp->regmap, DPTX_VIDEO_MSA2, FIELD_PREP(MISC0, misc)); in dw_dp_video_set_msa()
1227 regmap_write(dp->regmap, DPTX_VIDEO_MSA3, FIELD_PREP(MISC1, misc >> 8)); in dw_dp_video_set_msa()
1232 static int dw_dp_video_enable(struct dw_dp *dp) in dw_dp_video_enable() argument
1234 struct dw_dp_video *video = &dp->video; in dw_dp_video_enable()
1235 struct dw_dp_link *link = &dp->link; in dw_dp_video_enable()
1251 ret = dw_dp_video_set_pixel_mode(dp, pixel_mode); in dw_dp_video_enable()
1255 ret = dw_dp_video_set_msa(dp, color_format, bpc, vstart, hstart); in dw_dp_video_enable()
1259 regmap_update_bits(dp->regmap, DPTX_VSAMPLE_CTRL, VIDEO_MAPPING, in dw_dp_video_enable()
1268 regmap_write(dp->regmap, DPTX_VINPUT_POLARITY_CTRL, value); in dw_dp_video_enable()
1285 regmap_write(dp->regmap, DPTX_VIDEO_CONFIG1, value); in dw_dp_video_enable()
1290 regmap_write(dp->regmap, DPTX_VIDEO_CONFIG2, in dw_dp_video_enable()
1296 regmap_write(dp->regmap, DPTX_VIDEO_CONFIG3, in dw_dp_video_enable()
1303 regmap_write(dp->regmap, DPTX_VIDEO_CONFIG4, in dw_dp_video_enable()
1382 regmap_write(dp->regmap, DPTX_VIDEO_CONFIG5, in dw_dp_video_enable()
1391 regmap_write(dp->regmap, DPTX_VIDEO_HBLANK_INTERVAL, in dw_dp_video_enable()
1396 regmap_update_bits(dp->regmap, DPTX_VSAMPLE_CTRL, VIDEO_STREAM_ENABLE, in dw_dp_video_enable()
1400 dw_dp_send_vsc_sdp(dp); in dw_dp_video_enable()
1405 static bool dw_dp_detect(struct dw_dp *dp) in dw_dp_detect() argument
1409 if (dm_gpio_is_valid(&dp->hpd_gpio)) in dw_dp_detect()
1410 return dm_gpio_get_value(&dp->hpd_gpio); in dw_dp_detect()
1412 regmap_read(dp->regmap, DPTX_HPD_STATUS, &value); in dw_dp_detect()
1414 regmap_write(dp->regmap, DPTX_HPD_STATUS, HPD_HOT_PLUG); in dw_dp_detect()
1423 struct dw_dp *dp; in connector_to_dw_dp() local
1426 dp = dev_get_priv(conn->dev); in connector_to_dw_dp()
1428 dp = dev_get_priv(conn->dev->parent); in connector_to_dw_dp()
1430 return dp; in connector_to_dw_dp()
1436 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_init() local
1440 dp = dev_get_priv(conn->dev); in dw_dp_connector_init()
1442 dp = dev_get_priv(conn->dev->parent); in dw_dp_connector_init()
1443 conn_state->output_if |= dp->id ? VOP_OUTPUT_IF_DP1 : VOP_OUTPUT_IF_DP0; in dw_dp_connector_init()
1447 clk_set_defaults(dp->dev); in dw_dp_connector_init()
1449 reset_assert(&dp->reset); in dw_dp_connector_init()
1451 reset_deassert(&dp->reset); in dw_dp_connector_init()
1454 dp->id); in dw_dp_connector_init()
1455 dw_dp_init(dp); in dw_dp_connector_init()
1456 ret = generic_phy_power_on(&dp->phy); in dw_dp_connector_init()
1465 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_get_edid() local
1467 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_edid()
1494 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_prepare() local
1495 struct dw_dp_video *video = &dp->video; in dw_dp_connector_prepare()
1512 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_enable() local
1513 struct dw_dp_video *video = &dp->video; in dw_dp_connector_enable()
1518 if (dp->force_output) { in dw_dp_connector_enable()
1519 ret = dw_dp_set_phy_default_config(dp); in dw_dp_connector_enable()
1523 ret = dw_dp_link_enable(dp); in dw_dp_connector_enable()
1530 ret = dw_dp_video_enable(dp); in dw_dp_connector_enable()
1548 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_detect() local
1552 status = dw_dp_detect(dp); in dw_dp_connector_detect()
1559 dp->force_output = true; in dw_dp_connector_detect()
1561 if (!status && !dp->force_output) in dw_dp_connector_detect()
1562 generic_phy_power_off(&dp->phy); in dw_dp_connector_detect()
1564 if (status && !dp->force_output) { in dw_dp_connector_detect()
1565 ret = dw_dp_link_probe(dp); in dw_dp_connector_detect()
1573 static int dw_dp_mode_valid(struct dw_dp *dp, struct hdmi_edid_data *edid_data) in dw_dp_mode_valid() argument
1575 struct dw_dp_link *link = &dp->link; in dw_dp_mode_valid()
1591 if (!dw_dp_bandwidth_ok(dp, &edid_data->mode_buf[i], min_bpp, link->lanes, in dw_dp_mode_valid()
1599 static u32 dw_dp_get_output_bus_fmts(struct dw_dp *dp, struct hdmi_edid_data *edid_data) in dw_dp_get_output_bus_fmts() argument
1601 struct dw_dp_link *link = &dp->link; in dw_dp_get_output_bus_fmts()
1621 if (!dw_dp_bandwidth_ok(dp, edid_data->preferred_mode, fmt->bpp, link->lanes, in dw_dp_get_output_bus_fmts()
1638 struct dw_dp *dp = connector_to_dw_dp(conn); in dw_dp_connector_get_timing() local
1653 if (!dp->force_output) { in dw_dp_connector_get_timing()
1654 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_timing()
1673 dw_dp_mode_valid(dp, &edid_data); in dw_dp_connector_get_timing()
1692 bus_fmt = dw_dp_get_output_bus_fmts(dp, &edid_data); in dw_dp_connector_get_timing()
1726 static int dw_dp_ddc_init(struct dw_dp *dp) in dw_dp_ddc_init() argument
1728 dp->aux.name = "dw-dp"; in dw_dp_ddc_init()
1729 dp->aux.dev = dp->dev; in dw_dp_ddc_init()
1730 dp->aux.transfer = dw_dp_aux_transfer; in dw_dp_ddc_init()
1731 dp->aux.ddc.ddc_xfer = drm_dp_i2c_xfer; in dw_dp_ddc_init()
1736 static u32 dw_dp_parse_link_frequencies(struct dw_dp *dp) in dw_dp_parse_link_frequencies() argument
1738 struct udevice *dev = dp->dev; in dw_dp_parse_link_frequencies()
1768 static int dw_dp_parse_dt(struct dw_dp *dp) in dw_dp_parse_dt() argument
1770 dp->force_hpd = dev_read_bool(dp->dev, "force-hpd"); in dw_dp_parse_dt()
1772 dp->max_link_rate = dw_dp_parse_link_frequencies(dp); in dw_dp_parse_dt()
1773 if (!dp->max_link_rate) in dw_dp_parse_dt()
1774 dp->max_link_rate = 810000; in dw_dp_parse_dt()
1781 struct dw_dp *dp = dev_get_priv(dev); in dw_dp_probe() local
1786 ret = regmap_init_mem(dev, &dp->regmap); in dw_dp_probe()
1790 dp->id = of_alias_get_id(ofnode_to_np(dev->node), "dp"); in dw_dp_probe()
1791 if (dp->id < 0) in dw_dp_probe()
1792 dp->id = 0; in dw_dp_probe()
1794 dp->video.pixel_mode = pdata->pixel_mode; in dw_dp_probe()
1797 ret = power_domain_get(dev, &dp->pwrdom); in dw_dp_probe()
1802 ret = power_domain_on(&dp->pwrdom); in dw_dp_probe()
1807 ret = clk_get_bulk(dev, &dp->clks); in dw_dp_probe()
1812 ret = clk_enable_bulk(&dp->clks); in dw_dp_probe()
1819 ret = reset_get_by_index(dev, 0, &dp->reset); in dw_dp_probe()
1825 ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio, in dw_dp_probe()
1832 generic_phy_get_by_index(dev, 0, &dp->phy); in dw_dp_probe()
1834 dp->dev = dev; in dw_dp_probe()
1836 ret = dw_dp_parse_dt(dp); in dw_dp_probe()
1842 dw_dp_ddc_init(dp); in dw_dp_probe()
1844 rockchip_connector_bind(&dp->connector, dev, dp->id, &dw_dp_connector_funcs, NULL, in dw_dp_probe()
1883 struct dw_dp *dp = dev_get_priv(dev->parent); in dw_dp_port_probe() local
1885 rockchip_connector_bind(&dp->connector, dev, dp->id, &dw_dp_connector_funcs, NULL, in dw_dp_port_probe()